diff options
author | Hal Finkel <hfinkel@anl.gov> | 2013-01-30 21:17:42 +0000 |
---|---|---|
committer | Hal Finkel <hfinkel@anl.gov> | 2013-01-30 21:17:42 +0000 |
commit | 5bb16fdbb363abee2b9495116ff1a97568460cae (patch) | |
tree | 4fa301d922726dcc06b17c87ca00bb5165e9242b | |
parent | 2f89e8144b960468e4135f6d17cb6aac69197cbb (diff) |
Add definitions for the PPC a2q core marked as having QPX available
This is the first commit of a large series which will add support for the
QPX vector instruction set to the PowerPC backend. This instruction set is
used on the IBM Blue Gene/Q supercomputers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173973 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PowerPC/PPC.td | 7 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCSubtarget.h | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/a2q.ll | 10 |
3 files changed, 19 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td index cb15dadb7e..d3bcbaec03 100644 --- a/lib/Target/PowerPC/PPC.td +++ b/lib/Target/PowerPC/PPC.td @@ -58,6 +58,8 @@ def FeatureISEL : SubtargetFeature<"isel","HasISEL", "true", "Enable the isel instruction">; def FeatureBookE : SubtargetFeature<"booke", "IsBookE", "true", "Enable Book E instructions">; +def FeatureQPX : SubtargetFeature<"qpx","HasQPX", "true", + "Enable QPX instructions">; //===----------------------------------------------------------------------===// // Register File Description @@ -109,6 +111,11 @@ def : Processor<"a2", PPCA2Itineraries, [DirectiveA2, FeatureBookE, FeatureSTFIWX, FeatureISEL, Feature64Bit /*, Feature64BitRegs */]>; +def : Processor<"a2q", PPCA2Itineraries, [DirectiveA2, FeatureBookE, + FeatureMFOCRF, FeatureFSqrt, + FeatureSTFIWX, FeatureISEL, + Feature64Bit /*, Feature64BitRegs */, + FeatureQPX]>; def : Processor<"pwr6", G5Itineraries, [DirectivePwr6, FeatureAltivec, FeatureMFOCRF, FeatureFSqrt, FeatureSTFIWX, diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h index 3ddae6371a..28f8587429 100644 --- a/lib/Target/PowerPC/PPCSubtarget.h +++ b/lib/Target/PowerPC/PPCSubtarget.h @@ -70,6 +70,7 @@ protected: bool Use64BitRegs; bool IsPPC64; bool HasAltivec; + bool HasQPX; bool HasFSQRT; bool HasSTFIWX; bool HasISEL; @@ -150,6 +151,7 @@ public: bool hasFSQRT() const { return HasFSQRT; } bool hasSTFIWX() const { return HasSTFIWX; } bool hasAltivec() const { return HasAltivec; } + bool hasQPX() const { return HasQPX; } bool hasMFOCRF() const { return HasMFOCRF; } bool hasISEL() const { return HasISEL; } bool isBookE() const { return IsBookE; } diff --git a/test/CodeGen/PowerPC/a2q.ll b/test/CodeGen/PowerPC/a2q.ll new file mode 100644 index 0000000000..b26480f08b --- /dev/null +++ b/test/CodeGen/PowerPC/a2q.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -march=ppc64 -mcpu=a2q | FileCheck %s +; RUN: llc < %s -march=ppc64 -mcpu=a2 -mattr=+qpx | FileCheck %s + +define void @foo() { +entry: + ret void +} + +; CHECK: @foo + |