diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-20 18:43:00 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-20 18:43:00 +0000 |
| commit | 53df9259e94a9d6b99348ecf9683cdec7bf94bc8 (patch) | |
| tree | ca5d7b176287abe9f35df26a295ee32b95990849 | |
| parent | 418a3638acfa95e4212a38100adfc2f8cdd45919 (diff) | |
Make the global base reg GR32_NOSP.
It can sometimes be used in addressing modes that don't support %ESP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157165 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 5a5ba2fd2d..d8fd9064f3 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -3627,7 +3627,7 @@ unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const { // Create the register. The code to initialize it is inserted // later, by the CGBR pass (below). MachineRegisterInfo &RegInfo = MF->getRegInfo(); - GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32RegClass); + GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass); X86FI->setGlobalBaseReg(GlobalBaseReg); return GlobalBaseReg; } |