diff options
author | Jim Grosbach <grosbach@apple.com> | 2011-12-21 21:04:19 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-12-21 21:04:19 +0000 |
commit | 520dc78d92a47af5e644b09f401d278cb1d5d196 (patch) | |
tree | b83d4f3b8e743b367a1fb385c575a3b16c7b192a | |
parent | 5c0d761d63337ba776dbc97dd454951e987926ab (diff) |
Thumb2 assembly parsing of 'mov rd, rn, rrx'.
Maps to the RRX instruction. Missed this case earlier.
rdar://10615373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147096 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 4 | ||||
-rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 3 |
2 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index ab954bea25..5e438729a9 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5802,6 +5802,7 @@ processInstruction(MCInst &Inst, case ARM_AM::lsr: newOpc = isNarrow ? ARM::tLSRri : ARM::t2LSRri; break; case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLri : ARM::t2LSLri; break; case ARM_AM::ror: newOpc = ARM::t2RORri; isNarrow = false; break; + case ARM_AM::rrx: isNarrow = false; newOpc = ARM::t2RRX; break; } unsigned Ammount = ARM_AM::getSORegOffset(Inst.getOperand(2).getImm()); if (Ammount == 32) Ammount = 0; @@ -5811,7 +5812,8 @@ processInstruction(MCInst &Inst, TmpInst.addOperand(MCOperand::CreateReg( Inst.getOpcode() == ARM::t2MOVSsi ? ARM::CPSR : 0)); TmpInst.addOperand(Inst.getOperand(1)); // Rn - TmpInst.addOperand(MCOperand::CreateImm(Ammount)); + if (newOpc != ARM::t2RRX) + TmpInst.addOperand(MCOperand::CreateImm(Ammount)); TmpInst.addOperand(Inst.getOperand(3)); // CondCode TmpInst.addOperand(Inst.getOperand(4)); if (!isNarrow) diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 9e5c4be89d..9daeb9d2c4 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -1167,6 +1167,7 @@ _func: moveq r4, r4, lsr r5 moveq r4, r4, asr r5 moveq r4, r4, ror r5 + mov r4, r4, rrx @ CHECK: lsl.w r6, r2, #16 @ encoding: [0x4f,0xea,0x02,0x46] @ CHECK: lsr.w r6, r2, #16 @ encoding: [0x4f,0xea,0x12,0x46] @@ -1184,7 +1185,7 @@ _func: @ CHECK: lsreq r4, r5 @ encoding: [0xec,0x40] @ CHECK: asreq r4, r5 @ encoding: [0x2c,0x41] @ CHECK: roreq r4, r5 @ encoding: [0xec,0x41] - +@ CHECK: rrx r4, r4 @ encoding: [0x4f,0xea,0x34,0x04] @------------------------------------------------------------------------------ |