diff options
author | Eric Christopher <echristo@apple.com> | 2010-08-05 20:04:36 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2010-08-05 20:04:36 +0000 |
commit | 505656c6a2be361b9ae8ff230020fdea38886a7e (patch) | |
tree | 8ddad2a0951a85f9a39d1d3b7721be61ec61f77a | |
parent | da93b2cb8f84d008823828f114287be147646f73 (diff) |
Handle the memory barrier pseudo that goes to nothing for the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110371 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 077004cb49..4fd034e53e 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -705,6 +705,12 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI, llvm_unreachable("psuedo instructions should be removed before code" " emission"); break; + // Do nothing for Int_MemBarrier - it's just a comment. Add a debug + // to make it slightly easier to see. + case X86::Int_MemBarrier: + DEBUG(dbgs() << "#MEMBARRIER\n"); + break; + case TargetOpcode::INLINEASM: // We allow inline assembler nodes with empty bodies - they can // implicitly define registers, which is ok for JIT. @@ -716,7 +722,7 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI, case TargetOpcode::EH_LABEL: MCE.emitLabel(MI.getOperand(0).getMCSymbol()); break; - + case TargetOpcode::IMPLICIT_DEF: case TargetOpcode::KILL: break; |