instcombine: fold (x & y) | (~x & z) and (x & y) ^ (~x & z) into ((y ^ z) & x) ^ z which is one instruction shorter. (PR6773)

before:
  %and = and i32 %y, %x
  %neg = xor i32 %x, -1
  %and4 = and i32 %z, %neg
  %xor = xor i32 %and4, %and

after:
  %xor1 = xor i32 %z, %y
  %and2 = and i32 %xor1, %x
  %xor = xor i32 %and2, %z


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108136 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 45 insertions, 0 deletions

diff --git a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 8586054fce..3bfeba11cc 100644
--- a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -1584,6 +1584,14 @@ Instruction *InstCombiner::visitOr(BinaryOperator &I) {
     if ((match(A, m_Not(m_Specific(B))) &&
          match(D, m_Not(m_Specific(C)))))
       return BinaryOperator::CreateXor(C, B);
+
+    // (A & ~C) | (B & C) -> ((B ^ A) & C) ^ A
+    if (Op0->hasOneUse() && Op1->hasOneUse() &&
+        match(C, m_Not(m_Specific(D)))) {
+      Value *Xor = Builder->CreateXor(B, A, "xor");
+      Value *And = Builder->CreateAnd(Xor, D, "and");
+      return BinaryOperator::CreateXor(And, A);
+    }
   }
   
   // (X >> Z) | (Y >> Z)  -> (X|Y) >> Z  for all shifts.
@@ -1920,6 +1928,15 @@ Instruction *InstCombiner::visitXor(BinaryOperator &I) {
         return BinaryOperator::CreateAnd(NewOp, X);
       }
     }
+
+    // (A & ~C) ^ (B & C) -> ((B ^ A) & C) ^ A
+    if (Op0->hasOneUse() && Op1->hasOneUse() &&
+        match(Op0I, m_And(m_Value(A), m_Not(m_Value(D)))) &&
+        match(Op1I, m_And(m_Value(B), m_Value(D)))) {
+      Value *Xor = Builder->CreateXor(B, A, "xor");
+      Value *And = Builder->CreateAnd(Xor, D, "and");
+      return BinaryOperator::CreateXor(And, A);
+    }
   }
     
   // (icmp1 A, B) ^ (icmp2 A, B) --> (icmp3 A, B)
diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll
index c3526b77f6..86fca14dbd 100644
--- a/test/Transforms/InstCombine/or.ll
+++ b/test/Transforms/InstCombine/or.ll
@@ -350,3 +350,17 @@ define <4 x i32> @test32(<4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x i32
 ; CHECK: or <4 x i32> %and.i, %and.i129
 }
 
+; PR6773
+define i32 @test33(i32 %x, i32 %y, i32 %z) nounwind readnone {
+  %and = and i32 %y, %x
+  %not = xor i32 %x, -1
+  %and2 = and i32 %z, %not
+  %xor = xor i32 %and2, %and
+  ret i32 %xor
+; CHECK: @test33
+; CHECK: xor i32
+; CHECK: and i32
+; CHECK: xor i32
+; CHECK: ret i32
+}
+
diff --git a/test/Transforms/InstCombine/xor2.ll b/test/Transforms/InstCombine/xor2.ll
index 67f05efa23..27ce3bff47 100644
--- a/test/Transforms/InstCombine/xor2.ll
+++ b/test/Transforms/InstCombine/xor2.ll
@@ -51,3 +51,17 @@ define i32 @test4(i32 %A, i32 %B) {
 ; CHECK: %1 = ashr i32 %A, %B
 ; CHECK: ret i32 %1
 }
+
+; PR6773
+define i32 @test5(i32 %x, i32 %y, i32 %z) nounwind readnone {
+  %and = and i32 %y, %x
+  %not = xor i32 %x, -1
+  %and2 = and i32 %z, %not
+  %or = or i32 %and2, %and
+  ret i32 %or
+; CHECK: @test5
+; CHECK: xor i32
+; CHECK: and i32
+; CHECK: xor i32
+; CHECK: ret i32
+}