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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-22 22:45:24 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-22 22:45:24 +0000 |
commit | 4bd89873be74d7463676fde09ba6ea97a5b9d555 (patch) | |
tree | d2d9f32d600c8ca8c86b2231485c774177b26623 | |
parent | da7d6ccef55ef2be38671dc8af4a6e1ada4d7604 (diff) |
Add support for GR32 <-> FR32 cross class copies.
We already support GR64 <-> VR128 copies. All of these copies break
partial register dependencies by zeroing the high part of the target
register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140348 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 03471c7397..614202c2d5 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -2158,6 +2158,17 @@ static unsigned CopyToFromAsymmetricReg(unsigned DestReg, unsigned SrcReg, return X86::MOV64toSDrr; } + // SrcReg(FR32) -> DestReg(GR32) + // SrcReg(GR32) -> DestReg(FR32) + + if (X86::GR32RegClass.contains(DestReg) && X86::FR32RegClass.contains(SrcReg)) + // Copy from a FR32 register to a GR32 register. + return HasAVX ? X86::VMOVSS2DIrr : X86::MOVSS2DIrr; + + if (X86::FR32RegClass.contains(DestReg) && X86::GR32RegClass.contains(SrcReg)) + // Copy from a GR32 register to a FR32 register. + return HasAVX ? X86::VMOVDI2SSrr : X86::MOVDI2SSrr; + return 0; } |