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| author | Evan Cheng <evan.cheng@apple.com> | 2009-07-22 06:37:28 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-22 06:37:28 +0000 |
| commit | 4a8b7d030bf815baf082bc066c84ba091bc4e31f (patch) | |
| tree | 3710f584116221c82e52cbbc96e8e5d0729899a3 | |
| parent | 3b6627b9440f5588d326747896739e1f9c3d9ce2 (diff) | |
Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76728 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 861b468c2d..9e4b3216d3 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -166,8 +166,8 @@ def tPOP_RET : T1I<(outs reglist:$dst1, variable_ops), (ins), "pop $dst1", []>; let isCall = 1, - Defs = [R0, R1, R2, R3, LR, - D0, D1, D2, D3, D4, D5, D6, D7] in { + Defs = [R0, R1, R2, R3, R12, LR, + D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in { def tBL : T1Ix2<(outs), (ins i32imm:$func, variable_ops), "bl ${func:call}", [(ARMtcall tglobaladdr:$func)]>; |