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| author | Evan Cheng <evan.cheng@apple.com> | 2007-01-05 20:59:06 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-01-05 20:59:06 +0000 |
| commit | 489a87ca091ff4208ce0a972480e41ba1f78a2bf (patch) | |
| tree | 237d03436d16cdd39240126c4fc4d5558a698383 | |
| parent | ddbc606e941d550f06a86989b867e40a30ae0c8b (diff) | |
CopyToReg source operand can be a register as well. e.g. Copy from GlobalBaseReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32929 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index d5448055a8..39285b231a 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -307,7 +307,7 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op, } else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { MI->addImmOperand(C->getValue()); - } else if (RegisterSDNode*R = + } else if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Op)) { MI->addRegOperand(R->getReg(), false); } else if (GlobalAddressSDNode *TGA = @@ -457,7 +457,11 @@ void ScheduleDAG::EmitNode(SDNode *Node, case ISD::TokenFactor: break; case ISD::CopyToReg: { - unsigned InReg = getVR(Node->getOperand(2), VRBaseMap); + unsigned InReg; + if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Node->getOperand(2))) + InReg = R->getReg(); + else + InReg = getVR(Node->getOperand(2), VRBaseMap); unsigned DestReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg(); if (InReg != DestReg) // Coalesced away the copy? MRI->copyRegToReg(*BB, BB->end(), DestReg, InReg, |