diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2006-01-17 19:47:13 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-01-17 19:47:13 +0000 |
| commit | 433f8acefb78f1c8a2cf79c12b101ce7c4b20202 (patch) | |
| tree | 01aa4b1762a7d0f77cfa3e21d2425f9e10454991 | |
| parent | 7715fba9b14ff1b22459e33b19a4db734e72d5f2 (diff) | |
Bug fix: missing LegalizeOp() on newly created nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25401 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index a53be0a8aa..51675b8013 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1639,6 +1639,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { // Perform the larger operation, then round down. Result = DAG.getNode(ISD::SELECT, NVT, Tmp1, Tmp2,Tmp3); Result = DAG.getNode(TruncOp, Node->getValueType(0), Result); + Result = LegalizeOp(Result); break; } } @@ -1838,6 +1839,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { Result = DAG.getNode(ISD::SETCC, Node->getValueType(0), Tmp1, Tmp2, Node->getOperand(2)); + Result = LegalizeOp(Result); break; } case TargetLowering::Custom: { @@ -2246,6 +2248,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { Tmp1 = DAG.getNode(ISD::BSWAP, NVT, Tmp1); Result = DAG.getNode(ISD::SRL, NVT, Tmp1, DAG.getConstant(DiffBits, TLI.getShiftAmountTy())); + Result = LegalizeOp(Result); break; } case TargetLowering::Custom: @@ -2316,6 +2319,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; } } + Result = LegalizeOp(Result); break; } } @@ -2358,6 +2362,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { getSizeInBits(OVT), NVT)); break; } + Result = LegalizeOp(Result); break; } case TargetLowering::Custom: @@ -2384,7 +2389,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { DAG.getNode(ISD::SRL, VT, Tmp1, Tmp3), Tmp2)); } - Result = Tmp1; + Result = LegalizeOp(Tmp1); break; } case ISD::CTLZ: { |