diff options
author | Gabor Greif <ggreif@gmail.com> | 2009-01-31 00:58:14 +0000 |
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committer | Gabor Greif <ggreif@gmail.com> | 2009-01-31 00:58:14 +0000 |
commit | 3edbcada5733c2c13f71b72528e81c407e39aa42 (patch) | |
tree | 800fd0bdd1de54eed124a19cae0fb46a7fca38e5 | |
parent | 91b49b910c088b332869ccfb3e35735be2000b57 (diff) |
use precise accessors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63459 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/VMCore/AsmWriter.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/VMCore/AsmWriter.cpp b/lib/VMCore/AsmWriter.cpp index 6a17516be2..0322d669d3 100644 --- a/lib/VMCore/AsmWriter.cpp +++ b/lib/VMCore/AsmWriter.cpp @@ -1505,13 +1505,14 @@ void AssemblyWriter::printInstruction(const Instruction &I) { const Value *Operand = I.getNumOperands() ? I.getOperand(0) : 0; // Special case conditional branches to swizzle the condition out to the front - if (isa<BranchInst>(I) && I.getNumOperands() > 1) { + if (isa<BranchInst>(I) && cast<BranchInst>(I).isConditional()) { + BranchInst &BI(cast<BranchInst>(I)); Out << ' '; - writeOperand(I.getOperand(2), true); + writeOperand(BI.getCondition(), true); Out << ", "; - writeOperand(Operand, true); + writeOperand(BI.getSuccessor(0), true); Out << ", "; - writeOperand(I.getOperand(1), true); + writeOperand(BI.getSuccessor(1), true); } else if (isa<SwitchInst>(I)) { // Special case switch statement to get formatting nice and correct... |