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authorMicah Villmow <villmow@gmail.com>2012-09-19 22:47:07 +0000
committerMicah Villmow <villmow@gmail.com>2012-09-19 22:47:07 +0000
commit3e9b6db60ff5864d6789f768610a3509dac0b5ef (patch)
treef7a505d9aec2fa37085b23777cb1daf54d3047d0
parenteb79b545fc347142eba44a7ffd29d426da3281ec (diff)
Add in new data types that are used by AMDIL/ANL among others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164261 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/CodeGen/ValueTypes.h123
-rw-r--r--include/llvm/CodeGen/ValueTypes.td62
-rw-r--r--include/llvm/Intrinsics.td6
-rw-r--r--lib/VMCore/ValueTypes.cpp20
-rw-r--r--utils/TableGen/CodeGenTarget.cpp8
5 files changed, 155 insertions, 64 deletions
diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h
index eb38cd33d1..2d92d025b4 100644
--- a/include/llvm/CodeGen/ValueTypes.h
+++ b/include/llvm/CodeGen/ValueTypes.h
@@ -56,50 +56,56 @@ namespace llvm {
FIRST_FP_VALUETYPE = f16,
LAST_FP_VALUETYPE = ppcf128,
- v2i8 = 13, // 2 x i8
- v4i8 = 14, // 4 x i8
- v8i8 = 15, // 8 x i8
- v16i8 = 16, // 16 x i8
- v32i8 = 17, // 32 x i8
- v2i16 = 18, // 2 x i16
- v4i16 = 19, // 4 x i16
- v8i16 = 20, // 8 x i16
- v16i16 = 21, // 16 x i16
- v2i32 = 22, // 2 x i32
- v4i32 = 23, // 4 x i32
- v8i32 = 24, // 8 x i32
- v16i32 = 25, // 16 x i32
- v1i64 = 26, // 1 x i64
- v2i64 = 27, // 2 x i64
- v4i64 = 28, // 4 x i64
- v8i64 = 29, // 8 x i64
- v16i64 = 30, // 16 x i64
-
- v2f16 = 31, // 2 x f16
- v2f32 = 32, // 2 x f32
- v4f32 = 33, // 4 x f32
- v8f32 = 34, // 8 x f32
- v2f64 = 35, // 2 x f64
- v4f64 = 36, // 4 x f64
-
- FIRST_VECTOR_VALUETYPE = v2i8,
+ v2i1 = 13, // 2 x i1
+ v4i1 = 14, // 4 x i1
+ v8i1 = 15, // 8 x i1
+ v16i1 = 16, // 16 x i1
+ v2i8 = 17, // 2 x i8
+ v4i8 = 18, // 4 x i8
+ v8i8 = 19, // 8 x i8
+ v16i8 = 20, // 16 x i8
+ v32i8 = 21, // 32 x i8
+ v1i16 = 22, // 1 x i16
+ v2i16 = 23, // 2 x i16
+ v4i16 = 24, // 4 x i16
+ v8i16 = 25, // 8 x i16
+ v16i16 = 26, // 16 x i16
+ v1i32 = 27, // 1 x i32
+ v2i32 = 28, // 2 x i32
+ v4i32 = 29, // 4 x i32
+ v8i32 = 30, // 8 x i32
+ v16i32 = 31, // 16 x i32
+ v1i64 = 32, // 1 x i64
+ v2i64 = 33, // 2 x i64
+ v4i64 = 34, // 4 x i64
+ v8i64 = 35, // 8 x i64
+ v16i64 = 36, // 16 x i64
+
+ v2f16 = 37, // 2 x f16
+ v2f32 = 38, // 2 x f32
+ v4f32 = 39, // 4 x f32
+ v8f32 = 40, // 8 x f32
+ v2f64 = 41, // 2 x f64
+ v4f64 = 42, // 4 x f64
+
+ FIRST_VECTOR_VALUETYPE = v2i1,
LAST_VECTOR_VALUETYPE = v4f64,
- FIRST_INTEGER_VECTOR_VALUETYPE = v2i8,
+ FIRST_INTEGER_VECTOR_VALUETYPE = v2i1,
LAST_INTEGER_VECTOR_VALUETYPE = v16i64,
FIRST_FP_VECTOR_VALUETYPE = v2f16,
LAST_FP_VECTOR_VALUETYPE = v4f64,
- x86mmx = 37, // This is an X86 MMX value
+ x86mmx = 43, // This is an X86 MMX value
- Glue = 38, // This glues nodes together during pre-RA sched
+ Glue = 44, // This glues nodes together during pre-RA sched
- isVoid = 39, // This has no value
+ isVoid = 45, // This has no value
- Untyped = 40, // This value takes a register, but has
+ Untyped = 46, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
- LAST_VALUETYPE = 41, // This always remains at the end of the list.
+ LAST_VALUETYPE = 47, // This always remains at the end of the list.
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@@ -233,15 +239,21 @@ namespace llvm {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
+ case v2i1 :
+ case v4i1 :
+ case v8i1 :
+ case v16i1: return i1;
case v2i8 :
case v4i8 :
case v8i8 :
case v16i8:
case v32i8: return i8;
+ case v1i16:
case v2i16:
case v4i16:
case v8i16:
case v16i16: return i16;
+ case v1i32:
case v2i32:
case v4i32:
case v8i32:
@@ -265,21 +277,25 @@ namespace llvm {
default:
llvm_unreachable("Not a vector MVT!");
case v32i8: return 32;
+ case v16i1:
case v16i8:
case v16i16:
case v16i32:
case v16i64:return 16;
+ case v8i1:
case v8i8 :
case v8i16:
case v8i32:
case v8i64:
case v8f32: return 8;
+ case v4i1:
case v4i8:
case v4i16:
case v4i32:
case v4i64:
case v4f32:
case v4f64: return 4;
+ case v2i1:
case v2i8:
case v2i16:
case v2i32:
@@ -287,6 +303,8 @@ namespace llvm {
case v2f16:
case v2f32:
case v2f64: return 2;
+ case v1i16:
+ case v1i32:
case v1i64: return 1;
}
}
@@ -302,15 +320,21 @@ namespace llvm {
default:
llvm_unreachable("getSizeInBits called on extended MVT.");
case i1 : return 1;
- case i8 : return 8;
+ case v2i1: return 2;
+ case v4i1: return 4;
+ case i8 :
+ case v8i1: return 8;
case i16 :
case f16:
- case v2i8: return 16;
+ case v16i1:
+ case v2i8:
+ case v1i16: return 16;
case f32 :
case i32 :
case v4i8:
case v2i16:
- case v2f16: return 32;
+ case v2f16:
+ case v1i32: return 32;
case x86mmx:
case f64 :
case i64 :
@@ -393,6 +417,12 @@ namespace llvm {
switch (VT.SimpleTy) {
default:
break;
+ case MVT::i1:
+ if (NumElements == 2) return MVT::v2i1;
+ if (NumElements == 4) return MVT::v4i1;
+ if (NumElements == 8) return MVT::v8i1;
+ if (NumElements == 16) return MVT::v16i1;
+ break;
case MVT::i8:
if (NumElements == 2) return MVT::v2i8;
if (NumElements == 4) return MVT::v4i8;
@@ -401,12 +431,14 @@ namespace llvm {
if (NumElements == 32) return MVT::v32i8;
break;
case MVT::i16:
+ if (NumElements == 1) return MVT::v1i16;
if (NumElements == 2) return MVT::v2i16;
if (NumElements == 4) return MVT::v4i16;
if (NumElements == 8) return MVT::v8i16;
if (NumElements == 16) return MVT::v16i16;
break;
case MVT::i32:
+ if (NumElements == 1) return MVT::v1i32;
if (NumElements == 2) return MVT::v2i32;
if (NumElements == 4) return MVT::v4i32;
if (NumElements == 8) return MVT::v8i32;
@@ -529,6 +561,23 @@ namespace llvm {
return isSimple() ? V.isVector() : isExtendedVector();
}
+ /// is16BitVector - Return true if this is a 16-bit vector type.
+ bool is16BitVector() const {
+ if (!isSimple())
+ return isExtended16BitVector();
+
+ return (V == MVT::v2i8 || V==MVT::v1i16 || V == MVT::v16i1);
+ }
+
+ /// is32BitVector - Return true if this is a 32-bit vector type.
+ bool is32BitVector() const {
+ if (!isSimple())
+ return isExtended32BitVector();
+
+ return (V == MVT::v4i8 || V==MVT::v2i16
+ || V==MVT::v1i32);
+ }
+
/// is64BitVector - Return true if this is a 64-bit vector type.
bool is64BitVector() const {
return isSimple() ? V.is64BitVector() : isExtended64BitVector();
@@ -740,6 +789,8 @@ namespace llvm {
bool isExtendedFloatingPoint() const;
bool isExtendedInteger() const;
bool isExtendedVector() const;
+ bool isExtended16BitVector() const;
+ bool isExtended32BitVector() const;
bool isExtended64BitVector() const;
bool isExtended128BitVector() const;
bool isExtended256BitVector() const;
diff --git a/include/llvm/CodeGen/ValueTypes.td b/include/llvm/CodeGen/ValueTypes.td
index f4b75bd1b1..a707f887aa 100644
--- a/include/llvm/CodeGen/ValueTypes.td
+++ b/include/llvm/CodeGen/ValueTypes.td
@@ -33,36 +33,42 @@ def f80 : ValueType<80 , 10>; // 80-bit floating point value
def f128 : ValueType<128, 11>; // 128-bit floating point value
def ppcf128: ValueType<128, 12>; // PPC 128-bit floating point value
-def v2i8 : ValueType<16 , 13>; // 2 x i8 vector value
-def v4i8 : ValueType<32 , 14>; // 4 x i8 vector value
-def v8i8 : ValueType<64 , 15>; // 8 x i8 vector value
-def v16i8 : ValueType<128, 16>; // 16 x i8 vector value
-def v32i8 : ValueType<256, 17>; // 32 x i8 vector value
-def v2i16 : ValueType<32 , 18>; // 2 x i16 vector value
-def v4i16 : ValueType<64 , 19>; // 4 x i16 vector value
-def v8i16 : ValueType<128, 20>; // 8 x i16 vector value
-def v16i16 : ValueType<256, 21>; // 16 x i16 vector value
-def v2i32 : ValueType<64 , 22>; // 2 x i32 vector value
-def v4i32 : ValueType<128, 23>; // 4 x i32 vector value
-def v8i32 : ValueType<256, 24>; // 8 x i32 vector value
-def v16i32 : ValueType<512, 25>; // 16 x i32 vector value
-def v1i64 : ValueType<64 , 26>; // 1 x i64 vector value
-def v2i64 : ValueType<128, 27>; // 2 x i64 vector value
-def v4i64 : ValueType<256, 28>; // 4 x i64 vector value
-def v8i64 : ValueType<512, 29>; // 8 x i64 vector value
-def v16i64 : ValueType<1024,30>; // 16 x i64 vector value
+def v2i1 : ValueType<2 , 13>; // 2 x i1 vector value
+def v4i1 : ValueType<4 , 14>; // 4 x i1 vector value
+def v8i1 : ValueType<8 , 15>; // 8 x i1 vector value
+def v16i1 : ValueType<16, 16>; // 16 x i1 vector value
+def v2i8 : ValueType<16 , 17>; // 2 x i8 vector value
+def v4i8 : ValueType<32 , 18>; // 4 x i8 vector value
+def v8i8 : ValueType<64 , 19>; // 8 x i8 vector value
+def v16i8 : ValueType<128, 20>; // 16 x i8 vector value
+def v32i8 : ValueType<256, 21>; // 32 x i8 vector value
+def v1i16 : ValueType<16 , 22>; // 1 x i16 vector value
+def v2i16 : ValueType<32 , 23>; // 2 x i16 vector value
+def v4i16 : ValueType<64 , 24>; // 4 x i16 vector value
+def v8i16 : ValueType<128, 25>; // 8 x i16 vector value
+def v16i16 : ValueType<256, 26>; // 16 x i16 vector value
+def v1i32 : ValueType<32 , 27>; // 1 x i32 vector value
+def v2i32 : ValueType<64 , 28>; // 2 x i32 vector value
+def v4i32 : ValueType<128, 29>; // 4 x i32 vector value
+def v8i32 : ValueType<256, 30>; // 8 x i32 vector value
+def v16i32 : ValueType<512, 31>; // 16 x i32 vector value
+def v1i64 : ValueType<64 , 32>; // 1 x i64 vector value
+def v2i64 : ValueType<128, 33>; // 2 x i64 vector value
+def v4i64 : ValueType<256, 34>; // 4 x i64 vector value
+def v8i64 : ValueType<512, 35>; // 8 x i64 vector value
+def v16i64 : ValueType<1024,36>; // 16 x i64 vector value
-def v2f16 : ValueType<32 , 31>; // 2 x f16 vector value
-def v2f32 : ValueType<64 , 32>; // 2 x f32 vector value
-def v4f32 : ValueType<128, 33>; // 4 x f32 vector value
-def v8f32 : ValueType<256, 34>; // 8 x f32 vector value
-def v2f64 : ValueType<128, 35>; // 2 x f64 vector value
-def v4f64 : ValueType<256, 36>; // 4 x f64 vector value
+def v2f16 : ValueType<32 , 37>; // 2 x f16 vector value
+def v2f32 : ValueType<64 , 38>; // 2 x f32 vector value
+def v4f32 : ValueType<128, 39>; // 4 x f32 vector value
+def v8f32 : ValueType<256, 40>; // 8 x f32 vector value
+def v2f64 : ValueType<128, 41>; // 2 x f64 vector value
+def v4f64 : ValueType<256, 42>; // 4 x f64 vector value
-def x86mmx : ValueType<64 , 37>; // X86 MMX value
-def FlagVT : ValueType<0 , 38>; // Pre-RA sched glue
-def isVoid : ValueType<0 , 39>; // Produces no value
-def untyped: ValueType<8 , 40>; // Produces an untyped value
+def x86mmx : ValueType<64 , 43>; // X86 MMX value
+def FlagVT : ValueType<0 , 44>; // Pre-RA sched glue
+def isVoid : ValueType<0 , 45>; // Produces no value
+def untyped: ValueType<8 , 46>; // Produces an untyped value
def MetadataVT: ValueType<0, 250>; // Metadata
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td
index d1a0feef1d..804db49556 100644
--- a/include/llvm/Intrinsics.td
+++ b/include/llvm/Intrinsics.td
@@ -121,15 +121,21 @@ def llvm_metadata_ty : LLVMType<MetadataVT>; // !{...}
def llvm_x86mmx_ty : LLVMType<x86mmx>;
def llvm_ptrx86mmx_ty : LLVMPointerType<llvm_x86mmx_ty>; // <1 x i64>*
+def llvm_v2i1_ty : LLVMType<v2i1>; // 2 x i1
+def llvm_v4i1_ty : LLVMType<v4i1>; // 4 x i1
+def llvm_v8i1_ty : LLVMType<v8i1>; // 8 x i1
+def llvm_v16i1_ty : LLVMType<v16i1>; // 16 x i1
def llvm_v2i8_ty : LLVMType<v2i8>; // 2 x i8
def llvm_v4i8_ty : LLVMType<v4i8>; // 4 x i8
def llvm_v8i8_ty : LLVMType<v8i8>; // 8 x i8
def llvm_v16i8_ty : LLVMType<v16i8>; // 16 x i8
def llvm_v32i8_ty : LLVMType<v32i8>; // 32 x i8
+def llvm_v1i16_ty : LLVMType<v1i16>; // 1 x i16
def llvm_v2i16_ty : LLVMType<v2i16>; // 2 x i16
def llvm_v4i16_ty : LLVMType<v4i16>; // 4 x i16
def llvm_v8i16_ty : LLVMType<v8i16>; // 8 x i16
def llvm_v16i16_ty : LLVMType<v16i16>; // 16 x i16
+def llvm_v1i32_ty : LLVMType<v1i32>; // 1 x i32
def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
def llvm_v4i32_ty : LLVMType<v4i32>; // 4 x i32
def llvm_v8i32_ty : LLVMType<v8i32>; // 8 x i32
diff --git a/lib/VMCore/ValueTypes.cpp b/lib/VMCore/ValueTypes.cpp
index d1ca953175..e9370f62e6 100644
--- a/lib/VMCore/ValueTypes.cpp
+++ b/lib/VMCore/ValueTypes.cpp
@@ -55,6 +55,14 @@ bool EVT::isExtendedVector() const {
return LLVMTy->isVectorTy();
}
+bool EVT::isExtended16BitVector() const {
+ return isExtendedVector() && getSizeInBits() == 16;
+}
+
+bool EVT::isExtended32BitVector() const {
+ return isExtendedVector() && getSizeInBits() == 32;
+}
+
bool EVT::isExtended64BitVector() const {
return isExtendedVector() && getSizeInBits() == 64;
}
@@ -120,15 +128,21 @@ std::string EVT::getEVTString() const {
case MVT::Other: return "ch";
case MVT::Glue: return "glue";
case MVT::x86mmx: return "x86mmx";
+ case MVT::v2i1: return "v2i1";
+ case MVT::v4i1: return "v4i1";
+ case MVT::v8i1: return "v8i1";
+ case MVT::v16i1: return "v16i1";
case MVT::v2i8: return "v2i8";
case MVT::v4i8: return "v4i8";
case MVT::v8i8: return "v8i8";
case MVT::v16i8: return "v16i8";
case MVT::v32i8: return "v32i8";
+ case MVT::v1i16: return "v1i16";
case MVT::v2i16: return "v2i16";
case MVT::v4i16: return "v4i16";
case MVT::v8i16: return "v8i16";
case MVT::v16i16: return "v16i16";
+ case MVT::v1i32: return "v1i32";
case MVT::v2i32: return "v2i32";
case MVT::v4i32: return "v4i32";
case MVT::v8i32: return "v8i32";
@@ -171,15 +185,21 @@ Type *EVT::getTypeForEVT(LLVMContext &Context) const {
case MVT::f128: return Type::getFP128Ty(Context);
case MVT::ppcf128: return Type::getPPC_FP128Ty(Context);
case MVT::x86mmx: return Type::getX86_MMXTy(Context);
+ case MVT::v2i1: return VectorType::get(Type::getInt1Ty(Context), 2);
+ case MVT::v4i1: return VectorType::get(Type::getInt1Ty(Context), 4);
+ case MVT::v8i1: return VectorType::get(Type::getInt1Ty(Context), 8);
+ case MVT::v16i1: return VectorType::get(Type::getInt1Ty(Context), 16);
case MVT::v2i8: return VectorType::get(Type::getInt8Ty(Context), 2);
case MVT::v4i8: return VectorType::get(Type::getInt8Ty(Context), 4);
case MVT::v8i8: return VectorType::get(Type::getInt8Ty(Context), 8);
case MVT::v16i8: return VectorType::get(Type::getInt8Ty(Context), 16);
case MVT::v32i8: return VectorType::get(Type::getInt8Ty(Context), 32);
+ case MVT::v1i16: return VectorType::get(Type::getInt16Ty(Context), 1);
case MVT::v2i16: return VectorType::get(Type::getInt16Ty(Context), 2);
case MVT::v4i16: return VectorType::get(Type::getInt16Ty(Context), 4);
case MVT::v8i16: return VectorType::get(Type::getInt16Ty(Context), 8);
case MVT::v16i16: return VectorType::get(Type::getInt16Ty(Context), 16);
+ case MVT::v1i32: return VectorType::get(Type::getInt32Ty(Context), 1);
case MVT::v2i32: return VectorType::get(Type::getInt32Ty(Context), 2);
case MVT::v4i32: return VectorType::get(Type::getInt32Ty(Context), 4);
case MVT::v8i32: return VectorType::get(Type::getInt32Ty(Context), 8);
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 6335cc5c4c..3a3b0aa380 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -68,22 +68,30 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::x86mmx: return "MVT::x86mmx";
case MVT::Glue: return "MVT::Glue";
case MVT::isVoid: return "MVT::isVoid";
+ case MVT::v2i1: return "MVT::v2i1";
+ case MVT::v4i1: return "MVT::v4i1";
+ case MVT::v8i1: return "MVT::v8i1";
+ case MVT::v16i1: return "MVT::v16i1";
case MVT::v2i8: return "MVT::v2i8";
case MVT::v4i8: return "MVT::v4i8";
case MVT::v8i8: return "MVT::v8i8";
case MVT::v16i8: return "MVT::v16i8";
case MVT::v32i8: return "MVT::v32i8";
+ case MVT::v1i16: return "MVT::v1i16";
case MVT::v2i16: return "MVT::v2i16";
case MVT::v4i16: return "MVT::v4i16";
case MVT::v8i16: return "MVT::v8i16";
case MVT::v16i16: return "MVT::v16i16";
+ case MVT::v1i32: return "MVT::v1i32";
case MVT::v2i32: return "MVT::v2i32";
case MVT::v4i32: return "MVT::v4i32";
case MVT::v8i32: return "MVT::v8i32";
+ case MVT::v16i32: return "MVT::v16i32";
case MVT::v1i64: return "MVT::v1i64";
case MVT::v2i64: return "MVT::v2i64";
case MVT::v4i64: return "MVT::v4i64";
case MVT::v8i64: return "MVT::v8i64";
+ case MVT::v16i64: return "MVT::v16i64";
case MVT::v2f16: return "MVT::v2f16";
case MVT::v2f32: return "MVT::v2f32";
case MVT::v4f32: return "MVT::v4f32";