Consolidate the GPOpt stuff to all use the Subtarget, instead of still

depending on the command line option.  Now the command line option just
sets the subtarget as appropriate.  G5 opts will now default to on on
G5-enabled nightly testers among other machines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22688 91177308-0d34-0410-b5e6-96231b3b80d8

6 files changed, 48 insertions, 42 deletions

diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h
index 58b0a6fc41..5f041b576e 100644
--- a/lib/Target/PowerPC/PPC.h
+++ b/lib/Target/PowerPC/PPC.h
@@ -33,7 +33,6 @@ FunctionPass *createPPC64ISelPattern(TargetMachine &TM);
 FunctionPass *createDarwinAsmPrinter(std::ostream &OS, TargetMachine &TM);
 FunctionPass *createAIXAsmPrinter(std::ostream &OS, TargetMachine &TM);
 
-extern bool GPOPT;
 extern bool PICEnabled;
 extern PPCTargetEnum PPCTarget;
 } // end namespace llvm;
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 55007a4910..9ef26a0de9 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -19,6 +19,7 @@
 #define DEBUG_TYPE "asmprinter"
 #include "PowerPC.h"
 #include "PowerPCTargetMachine.h"
+#include "PowerPCSubtarget.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Module.h"
@@ -440,7 +441,8 @@ void DarwinAsmPrinter::printConstantPool(MachineConstantPool *MCP) {
 }
 
 bool DarwinAsmPrinter::doInitialization(Module &M) {
-  if (GPOPT) O << "\t.machine ppc970\n";
+  if (TM.getSubtarget<PPCSubtarget>().isGigaProcessor())
+    O << "\t.machine ppc970\n";
   AsmPrinter::doInitialization(M);
   return false;
 }
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index b9cdb858b3..ae7f9b64a8 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -96,7 +96,7 @@ namespace {
       setOperationAction(ISD::SREM , MVT::f32, Expand);
 
       // If we're enabling GP optimizations, use hardware square root
-      if (!GPOPT) {
+      if (!TM.getSubtarget<PPCSubtarget>().isGigaProcessor()) {
         setOperationAction(ISD::FSQRT, MVT::f64, Expand);
         setOperationAction(ISD::FSQRT, MVT::f32, Expand);
       }
@@ -536,6 +536,7 @@ namespace {
 Statistic<>Recorded("ppc-codegen", "Number of recording ops emitted");
 Statistic<>FusedFP("ppc-codegen", "Number of fused fp operations");
 Statistic<>FrameOff("ppc-codegen", "Number of frame idx offsets collapsed");
+
 //===--------------------------------------------------------------------===//
 /// ISel - PPC32 specific code to select PPC32 machine instructions for
 /// SelectionDAG operations.
@@ -929,7 +930,9 @@ unsigned ISel::getConstDouble(double doubleVal, unsigned Result=0) {
 void ISel::MoveCRtoGPR(unsigned CCReg, bool Inv, unsigned Idx, unsigned Result){
   unsigned IntCR = MakeReg(MVT::i32);
   BuildMI(BB, PPC::MCRF, 1, PPC::CR7).addReg(CCReg);
-  BuildMI(BB, GPOPT ? PPC::MFOCRF : PPC::MFCR, 1, IntCR).addReg(PPC::CR7);
+  bool GPOpt =
+    TLI.getTargetMachine().getSubtarget<PPCSubtarget>().isGigaProcessor();
+  BuildMI(BB, GPOpt ? PPC::MFOCRF : PPC::MFCR, 1, IntCR).addReg(PPC::CR7);
   if (Inv) {
     unsigned Tmp1 = MakeReg(MVT::i32);
     BuildMI(BB, PPC::RLWINM, 4, Tmp1).addReg(IntCR).addImm(32-(3-Idx))
diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp
index 3bfa7a6eef..686c11c669 100644
--- a/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -12,7 +12,23 @@
 //===----------------------------------------------------------------------===//
 
 #include "PowerPCSubtarget.h"
+#include "PowerPC.h"
 #include "llvm/Module.h"
+#include "llvm/Support/CommandLine.h"
+using namespace llvm;
+PPCTargetEnum llvm::PPCTarget = TargetDefault;
+
+namespace llvm {
+  cl::opt<PPCTargetEnum, true>
+  PPCTargetArg(cl::desc("Force generation of code for a specific PPC target:"),
+               cl::values(
+                          clEnumValN(TargetAIX,  "aix", "  Enable AIX codegen"),
+                          clEnumValN(TargetDarwin,"darwin","  Enable Darwin codegen"),
+                          clEnumValEnd),
+               cl::location(PPCTarget), cl::init(TargetDefault));
+  cl::opt<bool> EnableGPOPT("enable-gpopt", cl::Hidden,
+                             cl::desc("Enable optimizations for GP cpus"));
+}
 
 #if defined(__APPLE__)
 #include <mach/mach.h>
@@ -33,25 +49,26 @@ static boolean_t IsGP() {
 } 
 #endif
 
-using namespace llvm;
-
 PPCSubtarget::PPCSubtarget(const Module &M)
-  : TargetSubtarget(), stackAlignment(16), isGigaProcessor(false), isAIX(false),
-    isDarwin(false) {
-  // Set the boolean corresponding to the current target triple, or the default
+  : StackAlignment(16), IsGigaProcessor(false), IsAIX(false), IsDarwin(false) {
+
+    // Set the boolean corresponding to the current target triple, or the default
   // if one cannot be determined, to true.
   const std::string& TT = M.getTargetTriple();
   if (TT.length() > 5) {
-    isDarwin = TT.find("darwin") != std::string::npos;
+    IsDarwin = TT.find("darwin") != std::string::npos;
 #if defined(__APPLE__)
-    isGigaProcessor = IsGP();
+    IsGigaProcessor = IsGP();
 #endif
   } else if (TT.empty()) {
 #if defined(_POWER)
-    isAIX = true;
+    IsAIX = true;
 #elif defined(__APPLE__)
-    isDarwin = true;
-    isGigaProcessor = IsGP();
+    IsDarwin = true;
+    IsGigaProcessor = IsGP();
 #endif
   }
+  
+  // If GP opts are forced on by the commandline, do so now.
+  if (EnableGPOPT) IsGigaProcessor = true;
 }
diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h
index c114351800..60308f0c63 100644
--- a/lib/Target/PowerPC/PPCSubtarget.h
+++ b/lib/Target/PowerPC/PPCSubtarget.h
@@ -23,12 +23,12 @@ class PPCSubtarget : public TargetSubtarget {
 protected:
   /// stackAlignment - The minimum alignment known to hold of the stack frame on
   /// entry to the function and which must be maintained by every function.
-  unsigned stackAlignment;
+  unsigned StackAlignment;
 
   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
-  bool isGigaProcessor;
-  bool isAIX;
-  bool isDarwin;
+  bool IsGigaProcessor;
+  bool IsAIX;
+  bool IsDarwin;
 public:
   /// This constructor initializes the data members to match that
   /// of the specified module.
@@ -38,10 +38,12 @@ public:
   /// getStackAlignment - Returns the minimum alignment known to hold of the
   /// stack frame on entry to the function and which must be maintained by every
   /// function for this subtarget.
-  unsigned getStackAlignment() const { return stackAlignment; }
+  unsigned getStackAlignment() const { return StackAlignment; }
 
-  bool IsAIX() const { return isAIX; }
-  bool IsDarwin() const { return isDarwin; }
+  bool isAIX() const { return IsAIX; }
+  bool isDarwin() const { return IsDarwin; }
+  
+  bool isGigaProcessor() const { return IsGigaProcessor; }
 };
 } // End llvm namespace
 
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 009f4ebe63..9b2670cfca 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -30,25 +30,8 @@
 #include <iostream>
 using namespace llvm;
 
-bool llvm::GPOPT = false;
-PPCTargetEnum llvm::PPCTarget = TargetDefault;
-
-namespace llvm {
-  cl::opt<PPCTargetEnum, true>
-  PPCTargetArg(
-         cl::desc("Force generation of code for a specific PPC target:"),
-         cl::values(
-                    clEnumValN(TargetAIX,  "aix", "  Enable AIX codegen"),
-                    clEnumValN(TargetDarwin,"darwin","  Enable Darwin codegen"),
-                    clEnumValEnd),
-         cl::location(PPCTarget), cl::init(TargetDefault));
-  cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
-                             cl::desc("Enable LSR for PPC (beta)"),
-                             cl::Hidden);
-  cl::opt<bool, true> EnableGPOPT("enable-gpopt", cl::Hidden,
-                                  cl::location(GPOPT),
-                                  cl::desc("Enable optimizations for GP cpus"));
-}
+static cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc", cl::Hidden,
+                                  cl::desc("Enable LSR for PPC (beta)"));
 
 namespace {
   const std::string PPC32ID = "PowerPC/32bit";
@@ -71,8 +54,8 @@ PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
                                            const PowerPCFrameInfo &TFI)
 : TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) {
   if (TargetDefault == PPCTarget) {
-    if (Subtarget.IsAIX()) PPCTarget = TargetAIX;
-    if (Subtarget.IsDarwin()) PPCTarget = TargetDarwin;
+    if (Subtarget.isAIX()) PPCTarget = TargetAIX;
+    if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
   }
 }