diff options
| author | Christian Konig <christian.koenig@amd.com> | 2013-03-26 14:04:12 +0000 |
|---|---|---|
| committer | Christian Konig <christian.koenig@amd.com> | 2013-03-26 14:04:12 +0000 |
| commit | 3851e9869f8da4bf0a733bdd0510bd6579d00b09 (patch) | |
| tree | 242fe042dc7bd35c19bce9da805d0b0c151707f2 | |
| parent | a55e36584ac19f93b16bea598c06be4a2e5bdd5d (diff) | |
R600/SI: improve vector interpolation
Prevent loading M0 multiple times.
Signed-off-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178023 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/R600/SIInstrInfo.cpp | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp index de2373b11a..b9b25b5ecf 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/R600/SIInstrInfo.cpp @@ -65,6 +65,26 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, unsigned Opcode; const int16_t *SubIndices; + if (AMDGPU::M0 == DestReg) { + // Check if M0 isn't already set to this value + for (MachineBasicBlock::reverse_iterator E = MBB.rend(), + I = MachineBasicBlock::reverse_iterator(MI); I != E; ++I) { + + if (!I->definesRegister(AMDGPU::M0)) + continue; + + unsigned Opc = I->getOpcode(); + if (Opc != TargetOpcode::COPY && Opc != AMDGPU::S_MOV_B32) + break; + + if (!I->readsRegister(SrcReg)) + break; + + // The copy isn't necessary + return; + } + } + if (AMDGPU::SReg_32RegClass.contains(DestReg)) { assert(AMDGPU::SReg_32RegClass.contains(SrcReg)); BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DestReg) |