diff options
author | Jim Grosbach <grosbach@apple.com> | 2009-09-30 01:47:59 +0000 |
---|---|---|
committer | Jim Grosbach <grosbach@apple.com> | 2009-09-30 01:47:59 +0000 |
commit | 366e021fb2cb0efb8e727ef5e40bd55cef974c7a (patch) | |
tree | 50412a8dd1018103d0724a84e9421cff08791729 | |
parent | d1a5ca6cb11763059ba1ee1c965cc69abff92e38 (diff) |
replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
per customary usage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83137 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/PrologEpilogInserter.cpp | 4 | ||||
-rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 5 |
2 files changed, 4 insertions, 5 deletions
diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index 73e3c0a9c7..9ec54b5a1c 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -731,8 +731,6 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) { /// with physical registers. Use the register scavenger to find an /// appropriate register to use. void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) { - const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); - // Run through the instructions and find any virtual registers. for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) { @@ -746,7 +744,7 @@ void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) if (MI->getOperand(i).isReg()) { unsigned Reg = MI->getOperand(i).getReg(); - if (Reg == 0 || !TRI->isVirtualRegister(Reg)) + if (Reg == 0 || !TargetRegisterInfo::isVirtualRegister(Reg)) continue; // If we already have a scratch for this virtual register, use it diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index b99f88f94d..9fc3da3b17 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -242,7 +242,7 @@ unsigned RegScavenger::findSurvivorReg(MachineBasicBlock::iterator MI, for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); if (!MO.isReg() || MO.isUndef() || !MO.getReg() || - TRI->isVirtualRegister(MO.getReg())) + TargetRegisterInfo::isVirtualRegister(MO.getReg())) continue; Candidates.reset(MO.getReg()); for (const unsigned *R = TRI->getAliasSet(MO.getReg()); *R; R++) @@ -280,7 +280,8 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, // Exclude all the registers being used by the instruction. for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { MachineOperand &MO = I->getOperand(i); - if (MO.isReg() && MO.getReg() != 0 && !TRI->isVirtualRegister(MO.getReg())) + if (MO.isReg() && MO.getReg() != 0 && + !TargetRegisterInfo::isVirtualRegister(MO.getReg())) Candidates.reset(MO.getReg()); } |