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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-01-19 21:08:28 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-01-19 21:08:28 +0000
commit35f0febcb66b5a50a5a750efcbefc95f7fc25c7b (patch)
treef545cbf159ceb99abbb47af616dc8f4fb1c77fbb
parentdcff928b593ed443bab4713164bdaf2bd596259e (diff)
Remove predicates when changing an add into an unpredicable mov.
Since the mov is executed unconditionally, make sure that the add didn't have any predicate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93909 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/Thumb1RegisterInfo.cpp8
-rw-r--r--lib/Target/ARM/Thumb2InstrInfo.cpp10
-rw-r--r--test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll53
3 files changed, 66 insertions, 5 deletions
diff --git a/lib/Target/ARM/Thumb1RegisterInfo.cpp b/lib/Target/ARM/Thumb1RegisterInfo.cpp
index 9f3816a862..d6630ce29c 100644
--- a/lib/Target/ARM/Thumb1RegisterInfo.cpp
+++ b/lib/Target/ARM/Thumb1RegisterInfo.cpp
@@ -479,11 +479,15 @@ Thumb1RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
"Thumb add/sub sp, #imm immediate must be multiple of 4!");
}
- if (Offset == 0) {
+ unsigned PredReg;
+ if (Offset == 0 && getInstrPredicate(&MI, PredReg) == ARMCC::AL) {
// Turn it into a move.
MI.setDesc(TII.get(ARM::tMOVgpr2tgpr));
MI.getOperand(i).ChangeToRegister(FrameReg, false);
- MI.RemoveOperand(i+1);
+ // Remove offset and remaining explicit predicate operands.
+ do MI.RemoveOperand(i+1);
+ while (MI.getNumOperands() > i+1 &&
+ (!MI.getOperand(i+1).isReg() || !MI.getOperand(i+1).isImm()));
return 0;
}
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp
index f4a8c275be..387edaf05d 100644
--- a/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -329,12 +329,16 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
Offset += MI.getOperand(FrameRegIdx+1).getImm();
bool isSP = FrameReg == ARM::SP;
- if (Offset == 0) {
+ unsigned PredReg;
+ if (Offset == 0 && getInstrPredicate(&MI, PredReg) == ARMCC::AL) {
// Turn it into a move.
MI.setDesc(TII.get(ARM::tMOVgpr2gpr));
MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
- MI.RemoveOperand(FrameRegIdx+1);
- Offset = 0;
+ // Remove offset and remaining explicit predicate operands.
+ do MI.RemoveOperand(FrameRegIdx+1);
+ while (MI.getNumOperands() > FrameRegIdx+1 &&
+ (!MI.getOperand(FrameRegIdx+1).isReg() ||
+ !MI.getOperand(FrameRegIdx+1).isImm()));
return true;
}
diff --git a/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll b/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll
new file mode 100644
index 0000000000..41682c1054
--- /dev/null
+++ b/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll
@@ -0,0 +1,53 @@
+; RUN: llc -O3 -relocation-model=pic -mcpu=cortex-a8 -mattr=+thumb2 < %s
+;
+; This test creates a predicated t2ADDri instruction that is then turned into a t2MOVgpr2gpr instr.
+; Test that that the predicate operands are removed properly.
+;
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
+target triple = "thumbv7-apple-darwin10"
+
+declare arm_apcscc void @etoe53(i16* nocapture, i16* nocapture) nounwind
+
+define arm_apcscc void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
+entry:
+ %v = alloca [6 x i16], align 4 ; <[6 x i16]*> [#uses=1]
+ br i1 undef, label %bb2.i, label %bb5
+
+bb2.i: ; preds = %entry
+ %0 = bitcast double* %value to i16* ; <i16*> [#uses=1]
+ call arm_apcscc void @etoe53(i16* null, i16* %0) nounwind
+ ret void
+
+bb5: ; preds = %entry
+ switch i32 %icode, label %bb10 [
+ i32 57, label %bb14
+ i32 58, label %bb18
+ i32 67, label %bb22
+ i32 76, label %bb26
+ i32 77, label %bb35
+ ]
+
+bb10: ; preds = %bb5
+ br label %bb46
+
+bb14: ; preds = %bb5
+ unreachable
+
+bb18: ; preds = %bb5
+ unreachable
+
+bb22: ; preds = %bb5
+ unreachable
+
+bb26: ; preds = %bb5
+ br label %bb46
+
+bb35: ; preds = %bb5
+ unreachable
+
+bb46: ; preds = %bb26, %bb10
+ %1 = bitcast double* %value to i16* ; <i16*> [#uses=1]
+ %v47 = getelementptr inbounds [6 x i16]* %v, i32 0, i32 0 ; <i16*> [#uses=1]
+ call arm_apcscc void @etoe53(i16* %v47, i16* %1) nounwind
+ ret void
+}