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authorJim Grosbach <grosbach@apple.com>2011-09-16 18:05:48 +0000
committerJim Grosbach <grosbach@apple.com>2011-09-16 18:05:48 +0000
commit3443ed525a3bce98bacabb5aa8e67bee6def3b09 (patch)
tree308512e82e620b5214f03ddac7517aa78078c733
parent3c4c879695eb282f01d89da87d5da0a141e7f6f8 (diff)
Thumb2 assembly parsing and encoding for SMMULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139921 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp6
-rw-r--r--test/MC/ARM/basic-thumb2-instructions.s12
2 files changed, 15 insertions, 3 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 66c6e48ee1..51651e4b26 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3168,14 +3168,14 @@ getMnemonicAcceptInfo(StringRef Mnemonic, bool &CanAcceptCarrySet,
bool &CanAcceptPredicationCode) {
if (Mnemonic == "and" || Mnemonic == "lsl" || Mnemonic == "lsr" ||
Mnemonic == "rrx" || Mnemonic == "ror" || Mnemonic == "sub" ||
- Mnemonic == "smull" || Mnemonic == "add" || Mnemonic == "adc" ||
+ Mnemonic == "add" || Mnemonic == "adc" ||
Mnemonic == "mul" || Mnemonic == "bic" || Mnemonic == "asr" ||
Mnemonic == "umlal" || Mnemonic == "orr" || Mnemonic == "mvn" ||
Mnemonic == "rsb" || Mnemonic == "rsc" || Mnemonic == "orn" ||
Mnemonic == "sbc" || Mnemonic == "umull" || Mnemonic == "eor" ||
Mnemonic == "neg" ||
- (!isThumb() && (Mnemonic == "mov" || Mnemonic == "mla" ||
- Mnemonic == "smlal"))) {
+ (!isThumb() && (Mnemonic == "smull" || Mnemonic == "mov" ||
+ Mnemonic == "mla" || Mnemonic == "smlal"))) {
CanAcceptCarrySet = true;
} else
CanAcceptCarrySet = false;
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 625671b895..f5f65cb044 100644
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1975,6 +1975,18 @@ _func:
@------------------------------------------------------------------------------
+@ SMULL
+@------------------------------------------------------------------------------
+ smull r3, r9, r0, r1
+ it eq
+ smulleq r8, r3, r4, r5
+
+@ CHECK: smull r3, r9, r0, r1 @ encoding: [0x80,0xfb,0x01,0x39]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: smulleq r8, r3, r4, r5 @ encoding: [0x84,0xfb,0x05,0x83]
+
+
+@------------------------------------------------------------------------------
@ SUB (register)
@------------------------------------------------------------------------------
sub.w r5, r2, r12, rrx