diff options
| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:55:51 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:55:51 +0000 |
| commit | 338cf05f16e3d0f1f0de1c0d8969f11bc7df1240 (patch) | |
| tree | 36d2c1849646548a932016639317b353c7e65b1b | |
| parent | d519756203868b1bb92f2be9a357850689886ee2 (diff) | |
Fix epic bug with invalid regclass for R0D
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75956 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/SystemZ/SystemZRegisterInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.td b/lib/Target/SystemZ/SystemZRegisterInfo.td index e047150d6a..bdff54262f 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.td +++ b/lib/Target/SystemZ/SystemZRegisterInfo.td @@ -144,7 +144,7 @@ def : SubRegSet<5, [R0P, R2P, R4P, R6P, R8P, R10P, R12P, R14P], /// Register classes def GR32 : RegisterClass<"SystemZ", [i32], 32, // Volatile registers - [R0D, R1W, R2W, R3W, R4W, R5W, R6W, R7W, R8W, R9W, R10W, R12W, R13W, + [R0W, R1W, R2W, R3W, R4W, R5W, R6W, R7W, R8W, R9W, R10W, R12W, R13W, // Frame pointer, sometimes allocable R11W, // Volatile, but not allocable |