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authorAkira Hatanaka <ahatanaka@mips.com>2012-06-02 01:13:10 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-06-02 01:13:10 +0000
commit3309dbab30f4f49b217cbbf9e995e00d4aa5a7bb (patch)
tree1bf18e0bb169ed930656c63e4121ea265471529c
parent55a105160dc02a0d990a69820cfe63fef504195e (diff)
Add another test case which tests Mips' unaligned load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157874 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/CodeGen/Mips/load-shift-left-right.ll29
1 files changed, 29 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/load-shift-left-right.ll b/test/CodeGen/Mips/load-shift-left-right.ll
new file mode 100644
index 0000000000..d0928ee266
--- /dev/null
+++ b/test/CodeGen/Mips/load-shift-left-right.ll
@@ -0,0 +1,29 @@
+; RUN: llc -march=mipsel < %s | FileCheck -check-prefix=EL %s
+; RUN: llc -march=mips < %s | FileCheck -check-prefix=EB %s
+
+%struct.SI = type { i32 }
+
+@si = common global %struct.SI zeroinitializer, align 1
+
+define i32 @foo_load_i() nounwind readonly {
+entry:
+; EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
+; EL: lwr $[[R0]], 0($[[R1]])
+; EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
+; EB: lwr $[[R0]], 3($[[R1]])
+
+ %0 = load i32* getelementptr inbounds (%struct.SI* @si, i32 0, i32 0), align 1
+ ret i32 %0
+}
+
+define void @foo_store_i(i32 %a) nounwind {
+entry:
+; EL: swl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
+; EL: swr $[[R0]], 0($[[R1]])
+; EB: swl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
+; EB: swr $[[R0]], 3($[[R1]])
+
+ store i32 %a, i32* getelementptr inbounds (%struct.SI* @si, i32 0, i32 0), align 1
+ ret void
+}
+