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authorChris Lattner <sabre@nondot.org>2009-10-19 23:31:43 +0000
committerChris Lattner <sabre@nondot.org>2009-10-19 23:31:43 +0000
commit306d14f9aa9fe6891f5df447fe9e0a380de02501 (patch)
treefd374a310b952e650b55009a905235237706bb25
parent84d8bf9d28a1a8ce9314d6286f1c5c1d10aefc6c (diff)
handle addmode4 modifiers, fix a fixme in printRegisterList
by ignoring all implicit regs when lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84566 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp12
-rw-r--r--lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp2
2 files changed, 4 insertions, 10 deletions
diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
index 3a500db847..b227baec62 100644
--- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
@@ -116,13 +116,10 @@ void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op) {
void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum,
const char *Modifier) {
- // FIXME: ENABLE assert.
- //assert((Modifier == 0 || Modifier[0] == 0) && "Cannot print modifiers");
-
const MCOperand &MO1 = MI->getOperand(OpNum);
const MCOperand &MO2 = MI->getOperand(OpNum+1);
ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
- if (0 && Modifier && strcmp(Modifier, "submode") == 0) {
+ if (Modifier && strcmp(Modifier, "submode") == 0) {
if (MO1.getReg() == ARM::SP) {
// FIXME
bool isLDM = (MI->getOpcode() == ARM::LDM ||
@@ -132,7 +129,7 @@ void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum,
O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
} else
O << ARM_AM::getAMSubModeStr(Mode);
- } else if (0 && Modifier && strcmp(Modifier, "wide") == 0) {
+ } else if (Modifier && strcmp(Modifier, "wide") == 0) {
ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
if (Mode == ARM_AM::ia)
O << ".w";
@@ -147,12 +144,7 @@ void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum) {
O << "{";
// Always skip the first operand, it's the optional (and implicit writeback).
for (unsigned i = OpNum+1, e = MI->getNumOperands(); i != e; ++i) {
-#if 0 // FIXME: HANDLE WHEN LOWERING??
- if (MI->getOperand(i).isImplicit())
- continue;
-#endif
if (i != OpNum+1) O << ", ";
-
O << getRegisterName(MI->getOperand(i).getReg());
}
O << "}";
diff --git a/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp b/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp
index 45e61de3f8..cda5555186 100644
--- a/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp
@@ -118,6 +118,8 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MI->dump();
assert(0 && "unknown operand type");
case MachineOperand::MO_Register:
+ // Ignore all implicit register operands.
+ if (MO.isImplicit()) continue;
MCOp = MCOperand::CreateReg(MO.getReg());
break;
case MachineOperand::MO_Immediate: