diff options
author | Bill Wendling <isanbard@gmail.com> | 2009-04-28 00:21:31 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2009-04-28 00:21:31 +0000 |
commit | 2e9d5f912a9841d3685ba0241abe1131943fed29 (patch) | |
tree | 9dd3e8a53311bd2858fbd020e0a886952726bb2b | |
parent | d908adf2ec0dc774ac95441e755ce3fea94ce329 (diff) |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
93 files changed, 394 insertions, 346 deletions
diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index c1d86a2190..241a998925 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -65,8 +65,8 @@ namespace llvm { // Necessary for external weak linkage support std::set<const GlobalValue*> ExtWeakSymbols; - /// Fast - Generating code via fast instruction selection. - bool Fast; + /// OptLevel - Generating code at a specific optimization level. + unsigned OptLevel; public: /// Output stream on which we're printing assembly code. /// @@ -110,8 +110,8 @@ namespace llvm { bool VerboseAsm; protected: - AsmPrinter(raw_ostream &o, TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V); + explicit AsmPrinter(raw_ostream &o, TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V); public: virtual ~AsmPrinter(); diff --git a/include/llvm/CodeGen/DwarfWriter.h b/include/llvm/CodeGen/DwarfWriter.h index 4b35b288c9..5641407001 100644 --- a/include/llvm/CodeGen/DwarfWriter.h +++ b/include/llvm/CodeGen/DwarfWriter.h @@ -81,7 +81,7 @@ public: void EndFunction(MachineFunction *MF); /// ValidDebugInfo - Return true if V represents valid debug info value. - bool ValidDebugInfo(Value *V, bool FastISel); + bool ValidDebugInfo(Value *V, unsigned OptLevel); /// RecordSourceLine - Register a source line with debug info. Returns a /// unique label ID used to generate a label and provide correspondence to diff --git a/include/llvm/CodeGen/LinkAllCodegenComponents.h b/include/llvm/CodeGen/LinkAllCodegenComponents.h index 74026a4791..84d9819c2d 100644 --- a/include/llvm/CodeGen/LinkAllCodegenComponents.h +++ b/include/llvm/CodeGen/LinkAllCodegenComponents.h @@ -42,11 +42,11 @@ namespace { llvm::linkOcamlGC(); llvm::linkShadowStackGC(); - (void) llvm::createBURRListDAGScheduler(NULL, false); - (void) llvm::createTDRRListDAGScheduler(NULL, false); - (void) llvm::createTDListDAGScheduler(NULL, false); - (void) llvm::createFastDAGScheduler(NULL, false); - (void) llvm::createDefaultScheduler(NULL, false); + (void) llvm::createBURRListDAGScheduler(NULL, 3); + (void) llvm::createTDRRListDAGScheduler(NULL, 3); + (void) llvm::createTDListDAGScheduler(NULL, 3); + (void) llvm::createFastDAGScheduler(NULL, 3); + (void) llvm::createDefaultScheduler(NULL, 3); } } ForceCodegenLinking; // Force link by creating a global definition. diff --git a/include/llvm/CodeGen/SchedulerRegistry.h b/include/llvm/CodeGen/SchedulerRegistry.h index c967bfc446..e02dc7a392 100644 --- a/include/llvm/CodeGen/SchedulerRegistry.h +++ b/include/llvm/CodeGen/SchedulerRegistry.h @@ -32,7 +32,7 @@ class MachineBasicBlock; class RegisterScheduler : public MachinePassRegistryNode { public: - typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, bool); + typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, unsigned); static MachinePassRegistry Registry; @@ -64,27 +64,27 @@ public: /// createBURRListDAGScheduler - This creates a bottom up register usage /// reduction list scheduler. ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS, - bool Fast); + unsigned OptLevel); /// createTDRRListDAGScheduler - This creates a top down register usage /// reduction list scheduler. ScheduleDAGSDNodes *createTDRRListDAGScheduler(SelectionDAGISel *IS, - bool Fast); + unsigned OptLevel); /// createTDListDAGScheduler - This creates a top-down list scheduler with /// a hazard recognizer. ScheduleDAGSDNodes *createTDListDAGScheduler(SelectionDAGISel *IS, - bool Fast); + unsigned OptLevel); /// createFastDAGScheduler - This creates a "fast" scheduler. /// ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS, - bool Fast); + unsigned OptLevel); /// createDefaultScheduler - This creates an instruction scheduler appropriate /// for the target. ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS, - bool Fast); + unsigned OptLevel); } // end namespace llvm diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index a350d5fd93..d2d17cfa2e 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -202,7 +202,7 @@ public: /// certain types of nodes together, or eliminating superfluous nodes. The /// Level argument controls whether Combine is allowed to produce nodes and /// types that are illegal on the target. - void Combine(CombineLevel Level, AliasAnalysis &AA, bool Fast); + void Combine(CombineLevel Level, AliasAnalysis &AA, unsigned OptLevel); /// LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that /// only uses types natively supported by the target. Returns "true" if it @@ -218,7 +218,7 @@ public: /// /// Note that this is an involved process that may invalidate pointers into /// the graph. - void Legalize(bool TypesNeedLegalizing, bool Fast); + void Legalize(bool TypesNeedLegalizing, unsigned OptLevel); /// RemoveDeadNodes - This method deletes all unreachable nodes in the /// SelectionDAG. diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index e6bf8d76f4..d8802c7d9d 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -51,10 +51,10 @@ public: MachineBasicBlock *BB; AliasAnalysis *AA; GCFunctionInfo *GFI; - bool Fast; + unsigned OptLevel; static char ID; - explicit SelectionDAGISel(TargetMachine &tm, bool fast = false); + explicit SelectionDAGISel(TargetMachine &tm, unsigned OL = 3); virtual ~SelectionDAGISel(); TargetLowering &getTargetLowering() { return TLI; } diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index c4c0b0ec24..ba688b48de 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -213,7 +213,7 @@ public: virtual FileModel::Model addPassesToEmitFile(PassManagerBase &, raw_ostream &, CodeGenFileType, - bool /*Fast*/) { + unsigned /* OptLevel */) { return FileModel::None; } @@ -222,7 +222,8 @@ public: /// used to finish up adding passes to emit the file, if necessary. /// virtual bool addPassesToEmitFileFinish(PassManagerBase &, - MachineCodeEmitter *, bool /*Fast*/) { + MachineCodeEmitter *, + unsigned /* OptLevel */) { return true; } @@ -234,7 +235,7 @@ public: /// virtual bool addPassesToEmitMachineCode(PassManagerBase &, MachineCodeEmitter &, - bool /*Fast*/) { + unsigned /* OptLevel */) { return true; } @@ -243,7 +244,8 @@ public: /// use this. virtual bool WantsWholeFile() const { return false; } virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &, - CodeGenFileType, bool /*Fast*/) { + CodeGenFileType, + unsigned /* OptLevel */) { return true; } }; @@ -258,16 +260,16 @@ protected: // Can only create subclasses. /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for /// both emitting to assembly files or machine code output. /// - bool addCommonCodeGenPasses(PassManagerBase &, bool /*Fast*/); + bool addCommonCodeGenPasses(PassManagerBase &, unsigned /* OptLevel */); public: /// addPassesToEmitFile - Add passes to the specified pass manager to get the /// specified file emitted. Typically this will involve several steps of code - /// generation. If Fast is set to true, the code generator should emit code - /// as fast as possible, though the generated code may be less efficient. - /// This method should return FileModel::Error if emission of this file type - /// is not supported. + /// generation. If OptLevel is 0, the code generator should emit code as fast + /// as possible, though the generated code may be less efficient. This method + /// should return FileModel::Error if emission of this file type is not + /// supported. /// /// The default implementation of this method adds components from the /// LLVM retargetable code generator, invoking the methods below to get @@ -276,14 +278,15 @@ public: virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM, raw_ostream &Out, CodeGenFileType FileType, - bool Fast); + unsigned OptLevel); /// addPassesToEmitFileFinish - If the passes to emit the specified file had /// to be split up (e.g., to add an object writer pass), this method can be /// used to finish up adding passes to emit the file, if necessary. /// virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, - MachineCodeEmitter *MCE, bool Fast); + MachineCodeEmitter *MCE, + unsigned OptLevel); /// addPassesToEmitMachineCode - Add passes to the specified pass manager to /// get machine code emitted. This uses a MachineCodeEmitter object to handle @@ -292,21 +295,22 @@ public: /// not supported. /// virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, - MachineCodeEmitter &MCE, bool Fast); + MachineCodeEmitter &MCE, + unsigned OptLevel); /// Target-Independent Code Generator Pass Configuration Options. /// addInstSelector - This method should add any "last minute" LLVM->LLVM /// passes, then install an instruction selector pass, which converts from /// LLVM code to machine instructions. - virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) { + virtual bool addInstSelector(PassManagerBase &, unsigned /* OptLevel */) { return true; } /// addPreRegAllocPasses - This method may be implemented by targets that want /// to run passes immediately before register allocation. This should return /// true if -print-machineinstrs should print after these passes. - virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) { + virtual bool addPreRegAlloc(PassManagerBase &, unsigned /* OptLevel */) { return false; } |