diff options
| author | Eric Christopher <echristo@apple.com> | 2010-10-21 00:01:47 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2010-10-21 00:01:47 +0000 |
| commit | 2d8f6fe610fa859370c38cfbe38ff809a3a417de (patch) | |
| tree | 9d48f4c51559068703b954981caae5714c6bee27 | |
| parent | 6e56b18e575228a4f7318297155fe6ba2502a39b (diff) | |
Custom lower f64 args passed in integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116977 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index e500458cf1..4f0411d19a 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -1356,6 +1356,21 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args, VA.getLocReg()) .addReg(Arg); RegArgs.push_back(VA.getLocReg()); + } else if (VA.needsCustom()) { + // TODO: We need custom lowering for vector (v2f64) args. + if (VA.getLocVT() != MVT::f64) return false; + + CCValAssign &NextVA = ArgLocs[++i]; + + // TODO: Only handle register args for now. + if(!(VA.isRegLoc() && NextVA.isRegLoc())) return false; + + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + TII.get(ARM::VMOVRRD), VA.getLocReg()) + .addReg(NextVA.getLocReg(), RegState::Define) + .addReg(Arg)); + RegArgs.push_back(VA.getLocReg()); + RegArgs.push_back(NextVA.getLocReg()); } else { // Need to store return false; |