diff options
| author | Sean Silva <silvas@purdue.edu> | 2012-11-19 21:18:50 +0000 |
|---|---|---|
| committer | Sean Silva <silvas@purdue.edu> | 2012-11-19 21:18:50 +0000 |
| commit | 2d4a477b48d75b349e0834b6dacbb6fa3aaf87f9 (patch) | |
| tree | 43521d8c617db9b1d4553c30d8d25683a4cab783 | |
| parent | 239938ff77ef43c753881b030438f89a3dfc72c4 (diff) | |
docs: Fix reference to "bold" part of code example.
Fixes PR14380.
The prose was referring to a "bold" part of the code example, where the
boldness was lost in the transition from HTML. Unlike HTML, where one
can easily have a <b> inside a <pre>, reStructuredText is generally
unable to represent such nested markup.
Hack around it with the :emphasise-lines: option to the code-block
directive to single out the regions instead. Thankfully the regions are
close-enough to being full lines for this to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168329 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | docs/CodeGenerator.rst | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/docs/CodeGenerator.rst b/docs/CodeGenerator.rst index 104b848ebf..11174b7bee 100644 --- a/docs/CodeGenerator.rst +++ b/docs/CodeGenerator.rst @@ -968,7 +968,8 @@ The ``FADDS`` instruction is a simple binary single-precision add instruction. To perform this pattern match, the PowerPC backend includes the following instruction definitions: -:: +.. code-block:: text + :emphasize-lines: 4-5,9 def FMADDS : AForm_1<59, 29, (ops F4RC:$FRT, F4RC:$FRA, F4RC:$FRC, F4RC:$FRB), @@ -980,10 +981,10 @@ instruction definitions: "fadds $FRT, $FRA, $FRB", [(set F4RC:$FRT, (fadd F4RC:$FRA, F4RC:$FRB))]>; -The portion of the instruction definition in bold indicates the pattern used to -match the instruction. The DAG operators (like ``fmul``/``fadd``) are defined -in the ``include/llvm/Target/TargetSelectionDAG.td`` file. " ``F4RC``" is the -register class of the input and result values. +The highlighted portion of the instruction definitions indicates the pattern +used to match the instructions. The DAG operators (like ``fmul``/``fadd``) +are defined in the ``include/llvm/Target/TargetSelectionDAG.td`` file. +"``F4RC``" is the register class of the input and result values. The TableGen DAG instruction selector generator reads the instruction patterns in the ``.td`` file and automatically builds parts of the pattern matching code |