diff options
| author | Akira Hatanaka <ahatanak@gmail.com> | 2011-06-24 19:01:25 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-06-24 19:01:25 +0000 |
| commit | 25eba399cb7b4f9691cc63cb3829a00286c70bc4 (patch) | |
| tree | abe93353664ce9e87a3df269e2090b7440a3f81a | |
| parent | 535e58b910199fabcf7db45184bf679e38e42068 (diff) | |
Change the chain input of nodes that load the address of a function. This change
enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a
pre-existing node instead of redundantly create a new node every time it is
called.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133811 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 5 | ||||
| -rw-r--r-- | test/CodeGen/Mips/alloca.ll | 8 | ||||
| -rw-r--r-- | test/CodeGen/Mips/i64arg.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/Mips/largeimmprinting.ll | 2 |
4 files changed, 7 insertions, 12 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 01624c5cbd..e29c8f6a72 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -1911,7 +1911,7 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee, if (LoadSymAddr) { // Load callee address Callee = DAG.getNode(MipsISD::WrapperPIC, dl, MVT::i32, Callee); - SDValue LoadValue = DAG.getLoad(MVT::i32, dl, Chain, Callee, + SDValue LoadValue = DAG.getLoad(MVT::i32, dl, DAG.getEntryNode(), Callee, MachinePointerInfo::getGOT(), false, false, 0); @@ -1921,9 +1921,6 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee, Callee = DAG.getNode(ISD::ADD, dl, MVT::i32, LoadValue, Lo); } else Callee = LoadValue; - - // Use chain output from LoadValue - Chain = LoadValue.getValue(1); } // copy to T9 diff --git a/test/CodeGen/Mips/alloca.ll b/test/CodeGen/Mips/alloca.ll index ff503ecce0..fb4f56cb57 100644 --- a/test/CodeGen/Mips/alloca.ll +++ b/test/CodeGen/Mips/alloca.ll @@ -8,11 +8,9 @@ entry: ; CHECK: subu $[[T2:[0-9]+]], $sp, $[[SZ]] ; CHECK: addu $sp, $zero, $[[T2]] ; CHECK: addiu $[[T3:[0-9]+]], $sp, [[OFF]] -; CHECK: lw $25, %call16(foo)($gp) -; CHECK: addu $4, $zero, $[[T1]] -; CHECK: jalr $25 -; CHECK: lw $25, %call16(foo)($gp) -; CHECK: addu $4, $zero, $[[T3]] +; CHECK: lw $[[T4:[0-9]+]], %call16(foo)($gp) +; CHECK: addu $25, $zero, $[[T4]] +; CHECK: addu $4, $zero, $[[T1]] ; CHECK: jalr $25 %tmp1 = alloca i8, i32 %size, align 4 %add.ptr = getelementptr inbounds i8* %tmp1, i32 5 diff --git a/test/CodeGen/Mips/i64arg.ll b/test/CodeGen/Mips/i64arg.ll index 9a30453a51..560f2e9b08 100644 --- a/test/CodeGen/Mips/i64arg.ll +++ b/test/CodeGen/Mips/i64arg.ll @@ -10,8 +10,8 @@ entry: ; CHECK: jalr tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind ; CHECK: lw $25, %call16(ff2) -; CHECK: lw $[[R2:[0-9]+]], 80($sp) -; CHECK: lw $[[R3:[0-9]+]], 84($sp) +; CHECK: lw $[[R2:[0-9]+]], 88($sp) +; CHECK: lw $[[R3:[0-9]+]], 92($sp) ; CHECK: addu $4, $zero, $[[R2]] ; CHECK: addu $5, $zero, $[[R3]] ; CHECK: jalr $25 diff --git a/test/CodeGen/Mips/largeimmprinting.ll b/test/CodeGen/Mips/largeimmprinting.ll index fd7ae9e0ac..fcc20f7994 100644 --- a/test/CodeGen/Mips/largeimmprinting.ll +++ b/test/CodeGen/Mips/largeimmprinting.ll @@ -8,7 +8,7 @@ define void @f() nounwind { entry: ; CHECK: lui $at, 65534 ; CHECK: addu $at, $sp, $at -; CHECK: addiu $sp, $at, -16 +; CHECK: addiu $sp, $at, -24 ; CHECK: .cprestore 65536 %agg.tmp = alloca %struct.S1, align 1 |