diff options
author | Jeff Cohen <jeffc@jolt-lang.org> | 2005-05-10 02:22:38 +0000 |
---|---|---|
committer | Jeff Cohen <jeffc@jolt-lang.org> | 2005-05-10 02:22:38 +0000 |
commit | 19bb2283e6b3ce2bcb8bbbe76c61682caae3ddc7 (patch) | |
tree | 493af56c38c547500c9f56e98437028a48e4f6bf | |
parent | 780b6d08ab6a295a9511332b58980a8812d206ec (diff) |
Silence some VC++ warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21838 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelPattern.cpp | 1 |
2 files changed, 2 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index f130b161fa..3ea7b62c02 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -287,7 +287,7 @@ SelectionDAG::~SelectionDAG() { SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { if (Op.getValueType() == VT) return Op; - int64_t Imm = ~0ULL >> 64-MVT::getSizeInBits(VT); + int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); return getNode(ISD::AND, Op.getValueType(), Op, getConstant(Imm, Op.getValueType())); } @@ -561,7 +561,7 @@ SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, unsigned UOF = ISD::getUnorderedFlavor(Cond); if (UOF == 2) // FP operators that are undefined on NaNs. return getConstant(ISD::isTrueWhenEqual(Cond), VT); - if (UOF == ISD::isTrueWhenEqual(Cond)) + if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) return getConstant(UOF, VT); // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO // if it is not already. diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp index f9563a091b..f244d3ad39 100644 --- a/lib/Target/X86/X86ISelPattern.cpp +++ b/lib/Target/X86/X86ISelPattern.cpp @@ -240,7 +240,6 @@ X86TargetLowering::LowerCallTo(SDOperand Chain, std::vector<SDOperand> Stores; for (unsigned i = 0, e = Args.size(); i != e; ++i) { - unsigned ArgReg; SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); PtrOff = DAG.getNode(ISD::ADD, MVT::i32, StackPtr, PtrOff); |