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authorOwen Anderson <resistor@mac.com>2010-11-18 00:19:10 +0000
committerOwen Anderson <resistor@mac.com>2010-11-18 00:19:10 +0000
commit18333616cd824bee3abecd607d3aa432b5cf507d (patch)
tree3917e1a644acd16c8a8d20125e694b5f4ea29087
parent78786f9eb6b300a5f9cd46b7bde9a0e3aac6c634 (diff)
Provide correct Thumb2 encodings for basic multiplication operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119593 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrThumb2.td69
-rw-r--r--test/MC/ARM/thumb2.s5
2 files changed, 48 insertions, 26 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index 87e360dbf4..c21af95113 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -384,6 +384,21 @@ class T2sTwoRegShiftedReg<dag oops, dag iops, InstrItinClass itin,
let Inst{7-6} = ShiftedRm{8-7};
}
+class T2FourReg<dag oops, dag iops, InstrItinClass itin,
+ string opc, string asm, list<dag> pattern>
+ : T2sI<oops, iops, itin, opc, asm, pattern> {
+ bits<4> Rd;
+ bits<4> Rn;
+ bits<4> Rm;
+ bits<4> Ra;
+
+ let Inst{11-8} = Rd{3-0};
+ let Inst{19-16} = Rn{3-0};
+ let Inst{3-0} = Rm{3-0};
+ let Inst{15-12} = Ra{3-0};
+}
+
+
/// T2I_un_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for a
/// unary operation that produces a value. These are predicable and can be
/// changed to modify CPSR.
@@ -2087,9 +2102,9 @@ def : T2Pat<(t2_so_imm_not:$src),
// Multiply Instructions.
//
let isCommutable = 1 in
-def t2MUL: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32,
- "mul", "\t$dst, $a, $b",
- [(set rGPR:$dst, (mul rGPR:$a, rGPR:$b))]> {
+def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
+ "mul", "\t$Rd, $Rn, $Rm",
+ [(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> {
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0110;
let Inst{22-20} = 0b000;
@@ -2097,41 +2112,43 @@ def t2MUL: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b), IIC_iMUL32,
let Inst{7-4} = 0b0000; // Multiply
}
-def t2MLA: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32,
- "mla", "\t$dst, $a, $b, $c",
- [(set rGPR:$dst, (add (mul rGPR:$a, rGPR:$b), rGPR:$c))]> {
+def t2MLA: T2FourReg<
+ (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
+ "mla", "\t$Rd, $Rn, $Rm, $Ra",
+ [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]> {
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0110;
let Inst{22-20} = 0b000;
- let Inst{15-12} = {?, ?, ?, ?}; // Ra
let Inst{7-4} = 0b0000; // Multiply
}
-def t2MLS: T2I<(outs rGPR:$dst), (ins rGPR:$a, rGPR:$b, rGPR:$c), IIC_iMAC32,
- "mls", "\t$dst, $a, $b, $c",
- [(set rGPR:$dst, (sub rGPR:$c, (mul rGPR:$a, rGPR:$b)))]> {
+def t2MLS: T2FourReg<
+ (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
+ "mls", "\t$Rd, $Rn, $Rm, $Ra",
+ [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]> {
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0110;
let Inst{22-20} = 0b000;
- let Inst{15-12} = {?, ?, ?, ?}; // Ra
let Inst{7-4} = 0b0001; // Multiply and Subtract
}
// Extra precision multiplies with low / high results
let neverHasSideEffects = 1 in {
let isCommutable = 1 in {
-def t2SMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
- (ins rGPR:$a, rGPR:$b), IIC_iMUL64,
- "smull", "\t$ldst, $hdst, $a, $b", []> {
+def t2SMULL : T2FourReg<
+ (outs rGPR:$Rd, rGPR:$Ra),
+ (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64,
+ "smull", "\t$Rd, $Ra, $Rn, $Rm", []> {
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b000;
let Inst{7-4} = 0b0000;
}
-def t2UMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
- (ins rGPR:$a, rGPR:$b), IIC_iMUL64,
- "umull", "\t$ldst, $hdst, $a, $b", []> {
+def t2UMULL : T2FourReg<
+ (outs rGPR:$Rd, rGPR:$Ra),
+ (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64,
+ "umull", "\t$Rd, $Ra, $Rn, $Rm", []> {
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b010;
@@ -2140,27 +2157,27 @@ def t2UMULL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
} // isCommutable
// Multiply + accumulate
-def t2SMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
- (ins rGPR:$a, rGPR:$b), IIC_iMAC64,
- "smlal", "\t$ldst, $hdst, $a, $b", []>{
+def t2SMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra),
+ (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64,
+ "smlal", "\t$Rd, $Ra, $Rn, $Rm", []>{
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b100;
let Inst{7-4} = 0b0000;
}
-def t2UMLAL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
- (ins rGPR:$a, rGPR:$b), IIC_iMAC64,
- "umlal", "\t$ldst, $hdst, $a, $b", []>{
+def t2UMLAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra),
+ (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64,
+ "umlal", "\t$Rd, $Ra, $Rn, $Rm", []>{
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b110;
let Inst{7-4} = 0b0000;
}
-def t2UMAAL : T2I<(outs rGPR:$ldst, rGPR:$hdst),
- (ins rGPR:$a, rGPR:$b), IIC_iMAC64,
- "umaal", "\t$ldst, $hdst, $a, $b", []>{
+def t2UMAAL : T2FourReg<(outs rGPR:$Rd, rGPR:$Ra),
+ (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64,
+ "umaal", "\t$Rd, $Ra, $Rn, $Rm", []>{
let Inst{31-27} = 0b11111;
let Inst{26-23} = 0b0111;
let Inst{22-20} = 0b110;
diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s
index 8276349ae0..dff1fb042a 100644
--- a/test/MC/ARM/thumb2.s
+++ b/test/MC/ARM/thumb2.s
@@ -63,3 +63,8 @@
sbfx r0, r0, #7, #11
@ CHECK: ubfx r0, r0, #7, #11 @ encoding: [0xca,0x10,0xc0,0xf3]
ubfx r0, r0, #7, #11
+
+@ CHECK: mla r0, r0, r1, r2 @ encoding: [0x01,0x20,0x00,0xfb]
+ mla r0, r0, r1, r2
+@ CHECK: mls r0, r0, r1, r2 @ encoding: [0x11,0x20,0x00,0xfb]
+ mls r0, r0, r1, r2