aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorOwen Anderson <resistor@mac.com>2011-09-08 00:11:18 +0000
committerOwen Anderson <resistor@mac.com>2011-09-08 00:11:18 +0000
commit170580e8f413271f665d78f349237c4bcaf9d8c4 (patch)
tree2f13c796b6ad553d7443246ddd41576254401ec8
parentf0eee6eca8c39b11b6a41d9b04eba8985655df77 (diff)
Remove the "common" set of instructions shared between ARM and Thumb2 modes. This is no longer needed now that Thumb2 has its own copy of the STC/LDC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139268 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td2
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp18
2 files changed, 0 insertions, 20 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 507c7bbcf0..c935df9a8b 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -4320,7 +4320,6 @@ class ACI<dag oops, dag iops, string opc, string asm,
}
multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
- let DecoderNamespace = "Common" in {
def _OFFSET : ACI<(outs),
!con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
!strconcat(opc, cond), "\tp$cop, cr$CRd, $addr"> {
@@ -4416,7 +4415,6 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
let Inst{20} = load;
let DecoderMethod = "DecodeCopMemInstruction";
}
- }
}
defm LDC : LdStCop<{?,?,?,?}, 1, (ins pred:$p), "ldc", "${p}">;
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 13e410c139..66e64d3ffc 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -342,16 +342,6 @@ DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
return result;
}
- // Instructions that are shared between ARM and Thumb modes.
- // FIXME: This shouldn't really exist. It's an artifact of the
- // fact that we fail to encode a few instructions properly for Thumb.
- MI.clear();
- result = decodeCommonInstruction32(MI, insn, Address, this, STI);
- if (result != MCDisassembler::Fail) {
- Size = 4;
- return result;
- }
-
// VFP and NEON instructions, similarly, are shared between ARM
// and Thumb modes.
MI.clear();
@@ -595,14 +585,6 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
}
MI.clear();
- result = decodeCommonInstruction32(MI, insn32, Address, this, STI);
- if (result != MCDisassembler::Fail) {
- Size = 4;
- AddThumbPredicate(MI);
- return result;
- }
-
- MI.clear();
result = decodeVFPInstruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;