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| author | Evan Cheng <evan.cheng@apple.com> | 2010-01-26 23:07:57 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-01-26 23:07:57 +0000 |
| commit | 1613f40bab14b1c472ed2c491bc65343c073bb31 (patch) | |
| tree | 5c2fafd10f7d15b0e6e71b64feca902415b494d3 | |
| parent | 844be89d2db159c82ab83e8162319242252a3b53 (diff) | |
Delete blank lines that bug me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94610 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 36833840af..36145af37e 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1444,7 +1444,6 @@ X86TargetLowering::LowerMemArgument(SDValue Chain, const CCValAssign &VA, MachineFrameInfo *MFI, unsigned i) { - // Create the nodes corresponding to a load from this parameter slot. ISD::ArgFlagsTy Flags = Ins[i].Flags; bool AlwaysUseMutable = X86::IsEligibleForTailCallOpt(CallConv); @@ -1776,7 +1775,6 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) { - MachineFunction &MF = DAG.getMachineFunction(); bool Is64Bit = Subtarget->is64Bit(); bool IsStructRet = CallIsStructReturn(Outs); |