Minor refactoring of CC Lowering interfaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34656 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 107 insertions, 78 deletions

diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h
index 6abefc9140..72845c43f4 100644
--- a/include/llvm/CodeGen/CallingConvLower.h
+++ b/include/llvm/CodeGen/CallingConvLower.h
@@ -20,62 +20,8 @@
 
 namespace llvm {
   class MRegisterInfo;
+  class TargetMachine;
   
-/// CCState - This class holds information needed while lowering arguments and
-/// return values.  It captures which registers are already assigned and which
-/// stack slots are used.  It provides accessors to allocate these values.
-class CCState {
-  unsigned StackOffset;
-  const MRegisterInfo &MRI;
-  SmallVector<uint32_t, 16> UsedRegs;
-public:
-  CCState(const MRegisterInfo &mri);
-  
-  unsigned getNextStackOffset() const { return StackOffset; }
-
-  /// isAllocated - Return true if the specified register (or an alias) is
-  /// allocated.
-  bool isAllocated(unsigned Reg) const {
-    return UsedRegs[Reg/32] & (1 << (Reg&31));
-  }
-
-  /// getFirstUnallocated - Return the first unallocated register in the set, or
-  /// NumRegs if they are all allocated.
-  unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const {
-    for (unsigned i = 0; i != NumRegs; ++i)
-      if (!isAllocated(Regs[i]))
-        return i;
-    return NumRegs;
-  }
-  
-  /// AllocateReg - Attempt to allocate one of the specified registers.  If none
-  /// are available, return zero.  Otherwise, return the first one available,
-  /// marking it and any aliases as allocated.
-  unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
-    unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
-    if (FirstUnalloc == NumRegs)
-      return 0;    // Didn't find the reg.
-     
-    // Mark the register and any aliases as allocated.
-    unsigned Reg = Regs[FirstUnalloc];
-    MarkAllocated(Reg);
-    return Reg;
-  }
-  
-  /// AllocateStack - Allocate a chunk of stack space with the specified size
-  /// and alignment.
-  unsigned AllocateStack(unsigned Size, unsigned Align) {
-    assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
-    StackOffset = ((StackOffset + Align-1) & ~(Align-1));
-    unsigned Result = StackOffset;
-    StackOffset += Size;
-    return Result;
-  }
-private:
-  /// MarkAllocated - Mark a register and all of its aliases as allocated.
-  void MarkAllocated(unsigned Reg);
-};
-
 /// CCValAssign - Represent assignment of one arg/retval to a location.
 class CCValAssign {
 public:
@@ -144,6 +90,84 @@ public:
   LocInfo getLocInfo() const { return HTP; }
 };
 
+
+  
+/// CCState - This class holds information needed while lowering arguments and
+/// return values.  It captures which registers are already assigned and which
+/// stack slots are used.  It provides accessors to allocate these values.
+class CCState {
+  unsigned CallingConv;
+  const TargetMachine &TM;
+  const MRegisterInfo &MRI;
+  SmallVector<CCValAssign, 16> &Locs;
+  
+  unsigned StackOffset;
+  SmallVector<uint32_t, 16> UsedRegs;
+public:
+  CCState(unsigned CC, const TargetMachine &TM,
+          SmallVector<CCValAssign, 16> &locs);
+  
+  void addLoc(const CCValAssign &V) {
+    Locs.push_back(V);
+  }
+  
+  const TargetMachine &getTarget() const { return TM; }
+  unsigned getCallingConv() const { return CallingConv; }
+  
+  unsigned getNextStackOffset() const { return StackOffset; }
+
+  /// isAllocated - Return true if the specified register (or an alias) is
+  /// allocated.
+  bool isAllocated(unsigned Reg) const {
+    return UsedRegs[Reg/32] & (1 << (Reg&31));
+  }
+
+  /// getFirstUnallocated - Return the first unallocated register in the set, or
+  /// NumRegs if they are all allocated.
+  unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const {
+    for (unsigned i = 0; i != NumRegs; ++i)
+      if (!isAllocated(Regs[i]))
+        return i;
+    return NumRegs;
+  }
+  
+  /// AllocateReg - Attempt to allocate one register.  If it is not available,
+  /// return zero.  Otherwise, return the register, marking it and any aliases
+  /// as allocated.
+  unsigned AllocateReg(unsigned Reg) {
+    if (isAllocated(Reg)) return 0;
+    MarkAllocated(Reg);
+    return Reg;
+  }
+  
+  /// AllocateReg - Attempt to allocate one of the specified registers.  If none
+  /// are available, return zero.  Otherwise, return the first one available,
+  /// marking it and any aliases as allocated.
+  unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
+    unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
+    if (FirstUnalloc == NumRegs)
+      return 0;    // Didn't find the reg.
+     
+    // Mark the register and any aliases as allocated.
+    unsigned Reg = Regs[FirstUnalloc];
+    MarkAllocated(Reg);
+    return Reg;
+  }
+  
+  /// AllocateStack - Allocate a chunk of stack space with the specified size
+  /// and alignment.
+  unsigned AllocateStack(unsigned Size, unsigned Align) {
+    assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
+    StackOffset = ((StackOffset + Align-1) & ~(Align-1));
+    unsigned Result = StackOffset;
+    StackOffset += Size;
+    return Result;
+  }
+private:
+  /// MarkAllocated - Mark a register and all of its aliases as allocated.
+  void MarkAllocated(unsigned Reg);
+};
+
 } // end namespace llvm
 
 #endif
diff --git a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
index 47d08376bb..b045fcb818 100644
--- a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
+++ b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
@@ -14,9 +14,12 @@
 
 #include "llvm/CodeGen/CallingConvLower.h"
 #include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetMachine.h"
 using namespace llvm;
 
-CCState::CCState(const MRegisterInfo &mri) : MRI(mri) {
+CCState::CCState(unsigned CC, const TargetMachine &tm,
+                 SmallVector<CCValAssign, 16> &locs)
+  : CallingConv(CC), TM(tm), MRI(*TM.getRegisterInfo()), Locs(locs) {
   // No stack is used.
   StackOffset = 0;
   
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 6b42ff7993..80ea7b3012 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -429,6 +429,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
 //               Return Value Calling Convention Implementation
 //===----------------------------------------------------------------------===//
 
+
 /// GetRetValueLocs - If we are returning a set of values with the specified
 /// value types, determine the set of registers each one will land in.  This
 /// sets one element of the ResultRegs array for each element in the VTs array.
@@ -1060,11 +1061,11 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
 //===----------------------------------------------------------------------===//
 
 
-/// X86_64_CCC_AssignArgument - Implement the X86-64 C Calling Convention.
-static void X86_64_CCC_AssignArgument(unsigned ValNo,
+/// X86_64_CCC_AssignArgument - Implement the X86-64 C Calling Convention.  This
+/// returns true if the value was not handled by this calling convention.
+static bool X86_64_CCC_AssignArgument(unsigned ValNo,
                                       MVT::ValueType ArgVT, unsigned ArgFlags,
-                                      CCState &State,
-                                      SmallVector<CCValAssign, 16> &Locs) {
+                                      CCState &State) {
   MVT::ValueType LocVT = ArgVT;
   CCValAssign::LocInfo LocInfo = CCValAssign::Full;
   
@@ -1082,8 +1083,8 @@ static void X86_64_CCC_AssignArgument(unsigned ValNo,
       X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
     };
     if (unsigned Reg = State.AllocateReg(GPR32ArgRegs, 6)) {
-      Locs.push_back(CCValAssign::getReg(ValNo, ArgVT, Reg, LocVT, LocInfo));
-      return;
+      State.addLoc(CCValAssign::getReg(ValNo, ArgVT, Reg, LocVT, LocInfo));
+      return false;
     }
   }
   
@@ -1094,8 +1095,8 @@ static void X86_64_CCC_AssignArgument(unsigned ValNo,
       X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
     };
     if (unsigned Reg = State.AllocateReg(GPR64ArgRegs, 6)) {
-      Locs.push_back(CCValAssign::getReg(ValNo, ArgVT, Reg, LocVT, LocInfo));
-      return;
+      State.addLoc(CCValAssign::getReg(ValNo, ArgVT, Reg, LocVT, LocInfo));
+      return false;
     }
   }
   
@@ -1107,8 +1108,8 @@ static void X86_64_CCC_AssignArgument(unsigned ValNo,
       X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
     };
     if (unsigned Reg = State.AllocateReg(XMMArgRegs, 8)) {
-      Locs.push_back(CCValAssign::getReg(ValNo, ArgVT, Reg, LocVT, LocInfo));
-      return;
+      State.addLoc(CCValAssign::getReg(ValNo, ArgVT, Reg, LocVT, LocInfo));
+      return false;
     }
   }
   
@@ -1117,17 +1118,17 @@ static void X86_64_CCC_AssignArgument(unsigned ValNo,
   if (LocVT == MVT::i32 || LocVT == MVT::i64 ||
       LocVT == MVT::f32 || LocVT == MVT::f64) {
     unsigned Offset = State.AllocateStack(8, 8);
-    Locs.push_back(CCValAssign::getMem(ValNo, ArgVT, Offset, LocVT, LocInfo));
-    return;
+    State.addLoc(CCValAssign::getMem(ValNo, ArgVT, Offset, LocVT, LocInfo));
+    return false;
   }
   
   // Vectors get 16-byte stack slots that are 16-byte aligned.
   if (MVT::isVector(LocVT)) {
     unsigned Offset = State.AllocateStack(16, 16);
-    Locs.push_back(CCValAssign::getMem(ValNo, ArgVT, Offset, LocVT, LocInfo));
-    return;
+    State.addLoc(CCValAssign::getMem(ValNo, ArgVT, Offset, LocVT, LocInfo));
+    return false;
   }
-  assert(0 && "Unknown argument type!");
+  return true;
 }
 
 
@@ -1147,18 +1148,18 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
     X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
   };
 
-  SmallVector<SDOperand, 8> ArgValues;
-  
-  
-  CCState CCInfo(*getTargetMachine().getRegisterInfo());
   SmallVector<CCValAssign, 16> ArgLocs;
+  CCState CCInfo(MF.getFunction()->getCallingConv(), getTargetMachine(),
+                 ArgLocs);
   
   for (unsigned i = 0; i != NumArgs; ++i) {
     MVT::ValueType ArgVT = Op.getValue(i).getValueType();
     unsigned ArgFlags = cast<ConstantSDNode>(Op.getOperand(3+i))->getValue();
-    X86_64_CCC_AssignArgument(i, ArgVT, ArgFlags, CCInfo, ArgLocs);
+    if (X86_64_CCC_AssignArgument(i, ArgVT, ArgFlags, CCInfo)) 
+      assert(0 && "Unhandled argument type!");
   }
   
+  SmallVector<SDOperand, 8> ArgValues;
   unsigned LastVal = ~0U;
   for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
     CCValAssign &VA = ArgLocs[i];
@@ -1280,13 +1281,14 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG,
   SDOperand Callee    = Op.getOperand(4);
   unsigned NumOps     = (Op.getNumOperands() - 5) / 2;
 
-  CCState CCInfo(*getTargetMachine().getRegisterInfo());
   SmallVector<CCValAssign, 16> ArgLocs;
+  CCState CCInfo(CC, getTargetMachine(), ArgLocs);
 
   for (unsigned i = 0; i != NumOps; ++i) {
     MVT::ValueType ArgVT = Op.getOperand(5+2*i).getValueType();
     unsigned ArgFlags =cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
-    X86_64_CCC_AssignArgument(i, ArgVT, ArgFlags, CCInfo, ArgLocs);
+    if (X86_64_CCC_AssignArgument(i, ArgVT, ArgFlags, CCInfo)) 
+      assert(0 && "Unhandled argument type!");
   }
     
   // Get a count of how many bytes are to be pushed on the stack.