diff options
author | Dale Johannesen <dalej@apple.com> | 2010-02-18 18:51:15 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2010-02-18 18:51:15 +0000 |
commit | 116b799488327cb95f24ca321f9ab838d5d5e73d (patch) | |
tree | 6fae9e007e34fb77295f4023c0a7e81c548841ee | |
parent | e921792509e00c683ed6facc5e2840f5255bcc9d (diff) |
Generate DBG_VALUE from dbg.value intrinsics. These currently
comes out as comments but will eventually generate DWARF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96601 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 69a9d60bda..c2e675a032 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -1161,10 +1161,41 @@ bool X86FastISel::X86VisitIntrinsicCall(IntrinsicInst &I) { if (!X86SelectAddress(DI->getAddress(), AM)) return false; const TargetInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE); + // FIXME may need to add RegState::Debug to any registers produced, + // although ESP/EBP should be the only ones at the moment. addFullAddress(BuildMI(MBB, DL, II), AM).addImm(0). addMetadata(DI->getVariable()); return true; } + case Intrinsic::dbg_value: { + // FIXME this should eventually be moved to FastISel, when all targets + // are able to cope with DBG_VALUE. There is nothing target dependent here. + DbgValueInst *DI = cast<DbgValueInst>(&I); + const TargetInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE); + Value *V = DI->getValue(); + if (!V) { + // Currently the optimizer can produce this; insert an undef to + // help debugging. Probably the optimizer should not do this. + BuildMI(MBB, DL, II).addReg(0U).addImm(DI->getOffset()). + addMetadata(DI->getVariable()); + } else if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) { + BuildMI(MBB, DL, II).addImm(CI->getZExtValue()).addImm(DI->getOffset()). + addMetadata(DI->getVariable()); + } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) { + BuildMI(MBB, DL, II).addFPImm(CF).addImm(DI->getOffset()). + addMetadata(DI->getVariable()); + } else if (unsigned Reg = lookUpRegForValue(V)) { + BuildMI(MBB, DL, II).addReg(Reg, RegState::Debug).addImm(DI->getOffset()). + addMetadata(DI->getVariable()); + } else { + // We can't yet handle anything else here because it would require + // generating code, thus altering codegen because of debug info. + // Insert an undef so we can see what we dropped. + BuildMI(MBB, DL, II).addReg(0U).addImm(DI->getOffset()). + addMetadata(DI->getVariable()); + } + return true; + } case Intrinsic::trap: { BuildMI(MBB, DL, TII.get(X86::TRAP)); return true; |