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| author | Jim Grosbach <grosbach@apple.com> | 2011-09-19 23:58:31 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-09-19 23:58:31 +0000 |
| commit | 0efe213ed5a2c1d2647dc1306e684da6147a611e (patch) | |
| tree | d3e627844167f8199bd37026510802af72f30d4c | |
| parent | d9346fbb06d64266c2fe46edef7a15cb9af7e7e8 (diff) | |
Thumb2 range check on CPS mode immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140105 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index e41d7ff1c2..e7bb06f380 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -3301,7 +3301,7 @@ let mode = 0, M = 0 in def t2CPS2p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags), "$imod.w\t$iflags">; let imod = 0, iflags = 0, M = 1 in - def t2CPS1p : t2CPS<(ins i32imm:$mode), "\t$mode">; + def t2CPS1p : t2CPS<(ins imm0_31:$mode), "\t$mode">; // A6.3.4 Branches and miscellaneous control // Table A6-14 Change Processor State, and hint instructions |