diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2010-04-15 18:42:28 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-04-15 18:42:28 +0000 |
| commit | 0ea7d219ec5bb45a0b3e96c01070cfc21227291d (patch) | |
| tree | 9068c4cc40d336454060ac5133c002428b9ac971 | |
| parent | c8866980fe551352a7f9180248f1faa198ddae4e (diff) | |
ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP directly. In cases where there are two dyn_alloc in the same BB it would have caused the old SP value to be reused and badness ensues. rdar://7493908
llvm is generating poor code for dynamic alloca, I'll fix that later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101383 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll | 23 |
2 files changed, 24 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 7d48663189..2f24d2ea1c 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -945,7 +945,7 @@ SDNode *ARMDAGToDAGISel::SelectDYN_ALLOC(SDNode *N) { SDValue Chain = N->getOperand(0); SDValue Size = N->getOperand(1); SDValue Align = N->getOperand(2); - SDValue SP = CurDAG->getRegister(ARM::SP, MVT::i32); + SDValue SP = CurDAG->getCopyFromReg(Chain, dl, ARM::SP, MVT::i32); int32_t AlignVal = cast<ConstantSDNode>(Align)->getSExtValue(); if (AlignVal < 0) // We need to align the stack. Use Thumb1 tAND which is the only thumb diff --git a/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll b/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll new file mode 100644 index 0000000000..329494b321 --- /dev/null +++ b/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -O3 | FileCheck %s +; rdar://7493908 + +; Make sure the result of the first dynamic_alloc isn't copied back to sp more +; than once. We'll deal with poor codegen later. + +define arm_apcscc void @t() nounwind ssp { +entry: +; CHECK: t: +; CHECK: mvn r0, #7 +; CHECK: ands sp, r0 +; CHECK: mov r1, sp +; CHECK: mov sp, r1 +; Yes, this is stupid codegen, but it's correct. +; CHECK: sub sp, #16 +; CHECK: mov r1, sp +; CHECK: mov sp, r1 +; CHECK: ands sp, r0 + %size = mul i32 8, 2 + %vla_a = alloca i8, i32 %size, align 8 + %vla_b = alloca i8, i32 %size, align 8 + unreachable +} |