diff options
| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-09-24 18:32:19 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-09-24 18:32:19 +0000 |
| commit | 0d5357e3d5bd3edbe4ad09791e69e1fb85d4b17f (patch) | |
| tree | 73c4be57109b2fa7543016096a078cd80a626b53 | |
| parent | 8aa4b4cb6fb4c2dd91b17c115e4f0274f42b25ba (diff) | |
[Vector-Select] Address one of the problems in 10902.
When generating the trunc-store of i1's, we need to use the vector type and not
the scalar type.
This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when
running with -promote-elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140463 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 1337ef2242..f201227ae9 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1180,6 +1180,10 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // bytes. For example, promote EXTLOAD:i20 -> EXTLOAD:i24. unsigned NewWidth = SrcVT.getStoreSizeInBits(); EVT NVT = EVT::getIntegerVT(*DAG.getContext(), NewWidth); + if (SrcVT.isVector()) { + NVT = EVT::getVectorVT(*DAG.getContext(), NVT, + SrcVT.getVectorNumElements()); + } SDValue Ch; // The extra bits are guaranteed to be zero, since we stored them that @@ -1521,7 +1525,12 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // TRUNCSTORE:i1 X -> TRUNCSTORE:i8 (and X, 1) EVT NVT = EVT::getIntegerVT(*DAG.getContext(), StVT.getStoreSizeInBits()); - Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT); + if (StVT.isVector()) { + NVT = EVT::getVectorVT(*DAG.getContext(), NVT, + StVT.getVectorNumElements()); + } + + Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT.getScalarType()); Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), NVT, isVolatile, isNonTemporal, Alignment); } else if (StWidth & (StWidth - 1)) { |