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| author | Nate Begeman <natebegeman@mac.com> | 2008-05-12 23:09:43 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2008-05-12 23:09:43 +0000 |
| commit | 0d1704b955f9c7ae20e0b3a35b75aaab26e48cfd (patch) | |
| tree | 378c7d2d68ea037a442e3f49d1ef185a324bf6bc | |
| parent | 9bfa03c6fd8e02b738e0077fd1af7b18eeeeb4c1 (diff) | |
Teach Legalize how to scalarize VSETCC
Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 10 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 27 |
2 files changed, 37 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 1892e8a175..3abeac4b1f 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -7117,6 +7117,16 @@ SDOperand SelectionDAGLegalize::ScalarizeVectorOp(SDOperand Op) { ScalarizeVectorOp(Op.getOperand(1)), ScalarizeVectorOp(Op.getOperand(2))); break; + case ISD::VSETCC: { + SDOperand Op0 = ScalarizeVectorOp(Op.getOperand(0)); + SDOperand Op1 = ScalarizeVectorOp(Op.getOperand(1)); + Result = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(Op0), Op0, Op1, + Op.getOperand(2)); + Result = DAG.getNode(ISD::SELECT, NewVT, Result, + DAG.getConstant(-1ULL, NewVT), + DAG.getConstant(0ULL, NewVT)); + break; + } } if (TLI.isTypeLegal(NewVT)) diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 5c1e438f11..ace3502960 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1966,6 +1966,33 @@ defm PCMPGTB : PDI_binop_rm_int<0x64, "pcmpgtb", int_x86_sse2_pcmpgt_b>; defm PCMPGTW : PDI_binop_rm_int<0x65, "pcmpgtw", int_x86_sse2_pcmpgt_w>; defm PCMPGTD : PDI_binop_rm_int<0x66, "pcmpgtd", int_x86_sse2_pcmpgt_d>; +def : Pat<(v16i8 (vsetcc (v16i8 VR128:$src1), VR128:$src2, SETEQ)), + (PCMPEQBrr VR128:$src1, VR128:$src2)>; +def : Pat<(v16i8 (vsetcc (v16i8 VR128:$src1), (memop addr:$src2), SETEQ)), + (PCMPEQBrm VR128:$src1, addr:$src2)>; +def : Pat<(v8i16 (vsetcc (v8i16 VR128:$src1), VR128:$src2, SETEQ)), + (PCMPEQWrr VR128:$src1, VR128:$src2)>; +def : Pat<(v8i16 (vsetcc (v8i16 VR128:$src1), (memop addr:$src2), SETEQ)), + (PCMPEQWrm VR128:$src1, addr:$src2)>; +def : Pat<(v4i32 (vsetcc (v4i32 VR128:$src1), VR128:$src2, SETEQ)), + (PCMPEQDrr VR128:$src1, VR128:$src2)>; +def : Pat<(v4i32 (vsetcc (v4i32 VR128:$src1), (memop addr:$src2), SETEQ)), + (PCMPEQDrm VR128:$src1, addr:$src2)>; + +def : Pat<(v16i8 (vsetcc (v16i8 VR128:$src1), VR128:$src2, SETGT)), + (PCMPGTBrr VR128:$src1, VR128:$src2)>; +def : Pat<(v16i8 (vsetcc (v16i8 VR128:$src1), (memop addr:$src2), SETGT)), + (PCMPGTBrm VR128:$src1, addr:$src2)>; +def : Pat<(v8i16 (vsetcc (v8i16 VR128:$src1), VR128:$src2, SETGT)), + (PCMPGTWrr VR128:$src1, VR128:$src2)>; +def : Pat<(v8i16 (vsetcc (v8i16 VR128:$src1), (memop addr:$src2), SETGT)), + (PCMPGTWrm VR128:$src1, addr:$src2)>; +def : Pat<(v4i32 (vsetcc (v4i32 VR128:$src1), VR128:$src2, SETGT)), + (PCMPGTDrr VR128:$src1, VR128:$src2)>; +def : Pat<(v4i32 (vsetcc (v4i32 VR128:$src1), (memop addr:$src2), SETGT)), + (PCMPGTDrm VR128:$src1, addr:$src2)>; + + // Pack instructions defm PACKSSWB : PDI_binop_rm_int<0x63, "packsswb", int_x86_sse2_packsswb_128>; defm PACKSSDW : PDI_binop_rm_int<0x6B, "packssdw", int_x86_sse2_packssdw_128>; |