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authorChris Lattner <sabre@nondot.org>2009-07-10 06:07:08 +0000
committerChris Lattner <sabre@nondot.org>2009-07-10 06:07:08 +0000
commit07406346ebbf8a958a956eb05c1e04faedfe1e63 (patch)
tree5a878b0561715b33894bb5bc5acd00e1ca5d3dcf
parent281bada3b03b97dad0ac9890706a057ab31a5dd3 (diff)
convert some late code (called by regalloc and code emission)
to use isGlobalStubReference instead of GVRequiresExtraLoad (which should really be part of isel). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75234 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp6
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp11
2 files changed, 5 insertions, 12 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index b0bc6783bd..dff2c36e1f 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -293,15 +293,15 @@ static bool isDisp8(int Value) {
static bool gvNeedsNonLazyPtr(const MachineOperand &GVOp,
const TargetMachine &TM) {
- const GlobalValue *GV = GVOp.getGlobal();
-
// For Darwin-64, simulate the linktime GOT by using the same non-lazy-pointer
// mechanism as 32-bit mode.
if (TM.getSubtarget<X86Subtarget>().is64Bit() &&
!TM.getSubtarget<X86Subtarget>().isTargetDarwin())
return false;
- return TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM);
+ // Return true if this is a reference to a stub containing the address of the
+ // global, not the global itself.
+ return isGlobalStubReference(GVOp);
}
template<class CodeEmitter>
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 9f799fc73a..3e565313f8 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -762,7 +762,6 @@ unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
return 0;
}
-
/// regIsPICBase - Return true if register is PIC base (i.e.g defined by
/// X86::MOVPC32r.
static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) {
@@ -778,12 +777,6 @@ static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) {
return isPICBase;
}
-/// isGVStub - Return true if the GV requires an extra load to get the
-/// real address.
-static inline bool isGVStub(GlobalValue *GV, X86TargetMachine &TM) {
- return TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM);
-}
-
/// CanRematLoadWithDispOperand - Return true if a load with the specified
/// operand is a candidate for remat: for this to be true we need to know that
/// the load will always return the same value, even if moved.
@@ -796,7 +789,7 @@ static bool CanRematLoadWithDispOperand(const MachineOperand &MO,
if (MO.isGlobal()) {
// If this is a load of a stub, not of the global, we can remat it. This
// access will always return the address of the global.
- if (isGVStub(MO.getGlobal(), TM))
+ if (isGlobalStubReference(MO))
return true;
// If the global itself is constant, we can remat the load.
@@ -987,7 +980,7 @@ bool X86InstrInfo::isInvariantLoad(const MachineInstr *MI) const {
return true;
if (MO.isGlobal())
- return isGVStub(MO.getGlobal(), TM);
+ return isGlobalStubReference(MO);
// If this is a load from an invariant stack slot, the load is a constant.
if (MO.isFI()) {