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author | Chris Lattner <sabre@nondot.org> | 2006-11-03 23:53:25 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-11-03 23:53:25 +0000 |
commit | 0638b260dcf691752cbff29d5183e89bf01132d1 (patch) | |
tree | bc65cccb62ab86f87a853d13d5c13b20a2f037ff | |
parent | 60a09a5d6d9205ee68d2864504a5b0f6835bbf8b (diff) |
Describe PPC predicates, which are a pair of CR# and condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31438 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index e28295f6ba..02b066f582 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -255,6 +255,10 @@ def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits. let MIOperandInfo = (ops i32imm, ptr_rc); } +// PowerPC Predicate operand. 20 = always, CR0 is a dummy reg that doesn't +// matter. +def pred : PredicateOperand<(ops imm, CRRC), (ops 20, CR0)>; + // Define PowerPC specific addressing mode. def iaddr : ComplexPattern<iPTR, 2, "SelectAddrImm", [], []>; def xaddr : ComplexPattern<iPTR, 2, "SelectAddrIdx", [], []>; |