diff options
author | Cameron Zwarich <zwarich@apple.com> | 2011-05-19 04:44:19 +0000 |
---|---|---|
committer | Cameron Zwarich <zwarich@apple.com> | 2011-05-19 04:44:19 +0000 |
commit | 055cdfc541a7904d12ca389689a346d363a4f69c (patch) | |
tree | 75fbe11824c1a2a5caae767482d08061bccfbbc5 | |
parent | 28e2b1d29ad409479f0c6a3aa3f663c847b5994a (diff) |
Use the correct register class for Cell varargs spilling. This fixes all of the
verifier failures in the CodeGen/CellSPU tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131631 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index 4819d72d9b..d1cf50c67b 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -1215,7 +1215,7 @@ SPUTargetLowering::LowerFormalArguments(SDValue Chain, FuncInfo->setVarArgsFrameIndex( MFI->CreateFixedObject(StackSlotSize, ArgOffset, true)); SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); - unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::R32CRegClass); + unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::VECREGRegClass); SDValue ArgVal = DAG.getRegister(VReg, MVT::v16i8); SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, MachinePointerInfo(), false, false, 0); |