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authorBob Wilson <bob.wilson@apple.com>2009-10-28 00:37:03 +0000
committerBob Wilson <bob.wilson@apple.com>2009-10-28 00:37:03 +0000
commit04ea6e5150dd02fd60513a3d9fd1407aea350c02 (patch)
treed7bc3cbaf89b4d00e369c9265aa5a67840458f9b
parentb235224ee71d4701e7b578338486f0616c0c7e24 (diff)
Add an indirect branch pattern for ARM. Testcase will be coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85355 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td10
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 3bbf6aee48..c044f717f3 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -657,6 +657,16 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1 in
let Inst{27-20} = 0b00010010;
}
+// Indirect branches
+let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
+ def BRIND : AXI<(outs), (ins GPR:$dst), BrMiscFrm, IIC_Br, "bx $dst",
+ [(brind GPR:$dst)]> {
+ let Inst{7-4} = 0b0001;
+ let Inst{19-8} = 0b111111111111;
+ let Inst{27-20} = 0b00010010;
+ }
+}
+
// FIXME: remove when we have a way to marking a MI with these properties.
// FIXME: Should pc be an implicit operand like PICADD, etc?
let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,