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authorCraig Topper <craig.topper@gmail.com>2011-10-03 08:14:29 +0000
committerCraig Topper <craig.topper@gmail.com>2011-10-03 08:14:29 +0000
commit04c5be9f12fbb802ae48791399e999f29c0fb5c9 (patch)
tree1985bc9168192178f7c8af002e03b41a9f023977
parent04b0b34b3aa3be028295e2aeccdfd054c449e310 (diff)
Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140997 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/Disassembler/X86DisassemblerDecoder.c3
-rw-r--r--test/MC/Disassembler/X86/simple-tests.txt3
-rw-r--r--test/MC/Disassembler/X86/x86-32.txt3
3 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
index 1d5ad4c052..a1eb57c78f 100644
--- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
+++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
@@ -1491,6 +1491,9 @@ static int readVVVV(struct InternalInstruction* insn) {
else
return -1;
+ if (insn->mode != MODE_64BIT)
+ insn->vvvv &= 0x7;
+
return 0;
}
diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt
index cfaeb06d72..a9e6f41a73 100644
--- a/test/MC/Disassembler/X86/simple-tests.txt
+++ b/test/MC/Disassembler/X86/simple-tests.txt
@@ -365,3 +365,6 @@
# CHECK: testq $0, %rax
0x48 0xa9 0x00 0x00 0x00 0x00
+
+# CHECK: vaddps %xmm3, %xmm15, %xmm0
+0xc4 0xe1 0x00 0x58 0xc3
diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt
index 24740f6c31..35015c67d0 100644
--- a/test/MC/Disassembler/X86/x86-32.txt
+++ b/test/MC/Disassembler/X86/x86-32.txt
@@ -384,3 +384,6 @@
# CHECK: movl %eax, 0
0xa3 0x00 0x00 0x00 0x00
+
+# CHECK: vaddps %xmm3, %xmm7, %xmm0
+0xc4 0xe1 0x00 0x58 0xc3