diff options
| author | Jim Grosbach <grosbach@apple.com> | 2011-08-17 22:49:09 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-17 22:49:09 +0000 |
| commit | 00f5d982057574cf65a4a3f29548ff9fb0ecfbd0 (patch) | |
| tree | d6542aa7de0d2ad5f566f8c7f8b45ea1a7d39e7c | |
| parent | 56efe24431b045be120d1fd5f6b0aa43a6b01c48 (diff) | |
Thumb assembly parsing and encoding for ASR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb-instructions.s | 20 | ||||
| -rw-r--r-- | test/MC/ARM/thumb-diagnostics.s | 11 |
3 files changed, 32 insertions, 1 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index fcca436ac5..74d34e1443 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -2693,7 +2693,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic, // Next, determine if we have a carry setting bit. We explicitly ignore all // the instructions we know end in 's'. if (Mnemonic.endswith("s") && - !(Mnemonic == "asrs" || Mnemonic == "cps" || Mnemonic == "mls" || + !(Mnemonic == "cps" || Mnemonic == "mls" || Mnemonic == "mrs" || Mnemonic == "smmls" || Mnemonic == "vabs" || Mnemonic == "vcls" || Mnemonic == "vmls" || Mnemonic == "vmrs" || Mnemonic == "vnmls" || Mnemonic == "vqabs" || Mnemonic == "vrecps" || diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s index 340743ed09..7899a550f2 100644 --- a/test/MC/ARM/basic-thumb-instructions.s +++ b/test/MC/ARM/basic-thumb-instructions.s @@ -56,3 +56,23 @@ _func: @ CHECK: adr r2, _baz @ encoding: [A,0xa2] @ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10 + + +@------------------------------------------------------------------------------ +@ ASR (immediate) +@------------------------------------------------------------------------------ + asrs r2, r3, #32 + asrs r2, r3, #5 + asrs r2, r3, #1 + +@ CHECK: asrs r2, r3, #32 @ encoding: [0x1a,0x10] +@ CHECK: asrs r2, r3, #5 @ encoding: [0x5a,0x11] +@ CHECK: asrs r2, r3, #1 @ encoding: [0x5a,0x10] + + +@------------------------------------------------------------------------------ +@ ASR (register) +@------------------------------------------------------------------------------ + asrs r5, r2 + +@ CHECK: asrs r5, r2 @ encoding: [0x15,0x41] diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s index a08a94689b..8d8edcbfed 100644 --- a/test/MC/ARM/thumb-diagnostics.s +++ b/test/MC/ARM/thumb-diagnostics.s @@ -18,3 +18,14 @@ @ CHECK-ERRORS: error: instruction variant requires ARMv6 or later @ CHECK-ERRORS: mov r2, r3 @ CHECK-ERRORS: ^ + + +@ Out of range immediates for ASR instruction. + asrs r2, r3, #33 + asrs r2, r3, #0 +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: asrs r2, r3, #33 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: asrs r2, r3, #0 +@ CHECK-ERRORS: ^ |