aboutsummaryrefslogtreecommitdiff
path: root/sound/soc/codecs/lm49453.c
blob: e19490cfb3a8bde2036e61d877b3a8c407cc510c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
/*
 * lm49453.c  -  LM49453 ALSA Soc Audio driver
 *
 * Copyright (c) 2012 Texas Instruments, Inc
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * Initially based on sound/soc/codecs/wm8350.c
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/tlv.h>
#include <sound/jack.h>
#include <sound/initval.h>
#include <asm/div64.h>
#include "lm49453.h"

static struct reg_default lm49453_reg_defs[] = {
	{ 0, 0x00 },
	{ 1, 0x00 },
	{ 2, 0x00 },
	{ 3, 0x00 },
	{ 4, 0x00 },
	{ 5, 0x00 },
	{ 6, 0x00 },
	{ 7, 0x00 },
	{ 8, 0x00 },
	{ 9, 0x00 },
	{ 10, 0x00 },
	{ 11, 0x00 },
	{ 12, 0x00 },
	{ 13, 0x00 },
	{ 14, 0x00 },
	{ 15, 0x00 },
	{ 16, 0x00 },
	{ 17, 0x00 },
	{ 18, 0x00 },
	{ 19, 0x00 },
	{ 20, 0x00 },
	{ 21, 0x00 },
	{ 22, 0x00 },
	{ 23, 0x00 },
	{ 32, 0x00 },
	{ 33, 0x00 },
	{ 35, 0x00 },
	{ 36, 0x00 },
	{ 37, 0x00 },
	{ 46, 0x00 },
	{ 48, 0x00 },
	{ 49, 0x00 },
	{ 51, 0x00 },
	{ 56, 0x00 },
	{ 58, 0x00 },
	{ 59, 0x00 },
	{ 60, 0x00 },
	{ 61, 0x00 },
	{ 62, 0x00 },
	{ 63, 0x00 },
	{ 64, 0x00 },
	{ 65, 0x00 },
	{ 66, 0x00 },
	{ 67, 0x00 },
	{ 68, 0x00 },
	{ 69, 0x00 },
	{ 70, 0x00 },
	{ 71, 0x00 },
	{ 72, 0x00 },
	{ 73, 0x00 },
	{ 74, 0x00 },
	{ 75, 0x00 },
	{ 76, 0x00 },
	{ 77, 0x00 },
	{ 78, 0x00 },
	{ 79, 0x00 },
	{ 80, 0x00 },
	{ 81, 0x00 },
	{ 82, 0x00 },
	{ 83, 0x00 },
	{ 85, 0x00 },
	{ 85, 0x00 },
	{ 86, 0x00 },
	{ 87, 0x00 },
	{ 88, 0x00 },
	{ 89, 0x00 },
	{ 90, 0x00 },
	{ 91, 0x00 },
	{ 92, 0x00 },
	{ 93, 0x00 },
	{ 94, 0x00 },
	{ 95, 0x00 },
	{ 96, 0x01 },
	{ 97, 0x00 },
	{ 98, 0x00 },
	{ 99, 0x00 },
	{ 100, 0x00 },
	{ 101, 0x00 },
	{ 102, 0x00 },
	{ 103, 0x01 },
	{ 104, 0x01 },
	{ 105, 0x00 },
	{ 106, 0x01 },
	{ 107, 0x00 },
	{ 108, 0x00 },
	{ 109, 0x00 },
	{ 110, 0x00 },
	{ 111, 0x02 },
	{ 112, 0x02 },
	{ 113, 0x00 },
	{ 121, 0x80 },
	{ 122, 0xBB },
	{ 123, 0x80 },
	{ 124, 0xBB },
	{ 128, 0x00 },
	{ 130, 0x00 },
	{ 131, 0x00 },
	{ 132, 0x00 },
	{ 133, 0x0A },
	{ 134, 0x0A },
	{ 135, 0x0A },
	{ 136, 0x0F },
	{ 137, 0x00 },
	{ 138, 0x73 },
	{ 139, 0x33 },
	{ 140, 0x73 },
	{ 141, 0x33 },
	{ 142, 0x73 },
	{ 143, 0x33 },
	{ 144, 0x73 },
	{ 145, 0x33 },
	{ 146, 0x73 },
	{ 147, 0x33 },
	{ 148, 0x73 },
	{ 149, 0x33 },
	{ 150, 0x73 },
	{ 151, 0x33 },
	{ 152, 0x00 },
	{ 153, 0x00 },
	{ 154, 0x00 },
	{ 155, 0x00 },
	{ 176, 0x00 },
	{ 177, 0x00 },
	{ 178, 0x00 },
	{ 179, 0x00 },
	{ 180, 0x00 },
	{ 181, 0x00 },
	{ 182, 0x00 },
	{ 183, 0x00 },
	{ 184, 0x00 },
	{ 185, 0x00 },
	{ 186, 0x00 },
	{ 187, 0x00 },
	{ 188, 0x00 },
	{ 189, 0x00 },
	{ 208, 0x06 },
	{ 209, 0x00 },
	{ 210, 0x08 },
	{ 211, 0x54 },
	{ 212, 0x14 },
	{ 213, 0x0d },
	{ 214, 0x0d },
	{ 215, 0x14 },
	{ 216, 0x60 },
	{ 221, 0x00 },
	{ 222, 0x00 },
	{ 223, 0x00 },
	{ 224, 0x00 },
	{ 248, 0x00 },
	{ 249, 0x00 },
	{ 250, 0x00 },
	{ 255, 0x00 },
};

/* codec private data */
struct lm49453_priv {
	struct regmap *regmap;
	int fs_rate;
};

/* capture path controls */

static const char *lm49453_mic2mode_text[] = {"Single Ended", "Differential"};

static const SOC_ENUM_SINGLE_DECL(lm49453_mic2mode_enum, LM49453_P0_MICR_REG, 5,
				  lm49453_mic2mode_text);

static const char *lm49453_dmic_cfg_text[] = {"DMICDAT1", "DMICDAT2"};

static const SOC_ENUM_SINGLE_DECL(lm49453_dmic12_cfg_enum,
				  LM49453_P0_DIGITAL_MIC1_CONFIG_REG,
				  7, lm49453_dmic_cfg_text);

static const SOC_ENUM_SINGLE_DECL(lm49453_dmic34_cfg_enum,
				  LM49453_P0_DIGITAL_MIC2_CONFIG_REG,
				  7, lm49453_dmic_cfg_text);

/* MUX Controls */
static const char *lm49453_adcl_mux_text[] = { "MIC1", "Aux_L" };

static const char *lm49453_adcr_mux_text[] = { "MIC2", "Aux_R" };

static const struct soc_enum lm49453_adcl_enum =
	SOC_ENUM_SINGLE(LM49453_P0_ANALOG_MIXER_ADC_REG, 0,
			ARRAY_SIZE(lm49453_adcl_mux_text),
			lm49453_adcl_mux_text);

static const struct soc_enum lm49453_adcr_enum =
	SOC_ENUM_SINGLE(LM49453_P0_ANALOG_MIXER_ADC_REG, 1,
			ARRAY_SIZE(lm49453_adcr_mux_text),
			lm49453_adcr_mux_text);

static const struct snd_kcontrol_new lm49453_adcl_mux_control =
	SOC_DAPM_ENUM("ADC Left Mux", lm49453_adcl_enum);

static const struct snd_kcontrol_new lm49453_adcr_mux_control =
	SOC_DAPM_ENUM("ADC Right Mux", lm49453_adcr_enum);

static const struct snd_kcontrol_new lm49453_headset_left_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPL1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPL1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPL1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPL1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPL1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPL1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPL1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPL1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPL2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPL2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPL2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPL2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPL2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPL2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPL2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPL2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 0, 0, 0),
};

static const struct snd_kcontrol_new lm49453_headset_right_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPR1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPR1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPR1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPR1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPR1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPR1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPR1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPR1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPR2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPR2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPR2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPR2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPR2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPR2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPR2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPR2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 1, 0, 0),
};

static const struct snd_kcontrol_new lm49453_speaker_left_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSL1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSL1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSL1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSL1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSL1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSL1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSL1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSL1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSL2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSL2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSL2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSL2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSL2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSL2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSL2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSL2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 2, 0, 0),
};

static const struct snd_kcontrol_new lm49453_speaker_right_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSR1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSR1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSR1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSR1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSR1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSR1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSR1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSR1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSR2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSR2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSR2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSR2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSR2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSR2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSR2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSR2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 3, 0, 0),
};

static const struct snd_kcontrol_new lm49453_haptic_left_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAL1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAL1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAL1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAL1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAL1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAL1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAL1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAL1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAL2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAL2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAL2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAL2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAL2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAL2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAL2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAL2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 4, 0, 0),
};

static const struct snd_kcontrol_new lm49453_haptic_right_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAR1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAR1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAR1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAR1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAR1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAR1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAR1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAR1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAR2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAR2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAR2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAR2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAR2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAR2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAR2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAR2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 5, 0, 0),
};

static const struct snd_kcontrol_new lm49453_lineout_left_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOL1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOL1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOL1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOL1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOL1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOL1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOL1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOL1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOL2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOL2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOL2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOL2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOL2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOL2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOL2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOL2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 6, 0, 0),
};

static const struct snd_kcontrol_new lm49453_lineout_right_mixer[] = {
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOR1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOR1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOR1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOR1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOR1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOR1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOR1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOR1_REG, 7, 1, 0),
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOR2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOR2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOR2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOR2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOR2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOR2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOR2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOR2_REG, 7, 1, 0),
SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 7, 0, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx1_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT1_TX1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT1_TX1_REG, 7, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx2_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT1_TX2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT1_TX2_REG, 7, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx3_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX3_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX3_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX3_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX3_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX3_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX3_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_PORT1_TX3_REG, 6, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx4_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX4_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX4_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX4_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX4_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX4_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX4_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_PORT1_TX4_REG, 6, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx5_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX5_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX5_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX5_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX5_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX5_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX5_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_PORT1_TX5_REG, 6, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx6_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX6_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX6_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX6_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX6_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX6_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX6_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_PORT1_TX6_REG, 6, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx7_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX7_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX7_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX7_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX7_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX7_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX7_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_PORT1_TX7_REG, 6, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port1_tx8_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX8_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX8_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX8_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX8_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX8_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX8_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_PORT1_TX8_REG, 6, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port2_tx1_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX1_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX1_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX1_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX1_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX1_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX1_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT2_TX1_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT2_TX1_REG, 7, 1, 0),
};

static const struct snd_kcontrol_new lm49453_port2_tx2_mixer[] = {
SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX2_REG, 0, 1, 0),
SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX2_REG, 1, 1, 0),
SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX2_REG, 2, 1, 0),
SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX2_REG, 3, 1, 0),
SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX2_REG, 4, 1, 0),
SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX2_REG, 5, 1, 0),
SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT2_TX2_REG, 6, 1, 0),
SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT2_TX2_REG, 7, 1, 0),
};

/* TLV Declarations */
static const DECLARE_TLV_DB_SCALE(adc_dac_tlv, -7650, 150, 1);
static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 200, 1);
static const DECLARE_TLV_DB_SCALE(port_tlv, -1800, 600, 0);
static const DECLARE_TLV_DB_SCALE(stn_tlv, -7200, 150, 0);

static const struct snd_kcontrol_new lm49453_sidetone_mixer_controls[] = {
/* Sidetone supports mono only */
SOC_DAPM_SINGLE_TLV("Sidetone ADCL Volume", LM49453_P0_STN_VOL_ADCL_REG,
		     0, 0x3F, 0, stn_tlv),
SOC_DAPM_SINGLE_TLV("Sidetone ADCR Volume", LM49453_P0_STN_VOL_ADCR_REG,
		     0, 0x3F, 0, stn_tlv),
SOC_DAPM_SINGLE_TLV("Sidetone DMIC1L Volume", LM49453_P0_STN_VOL_DMIC1L_REG,
		     0, 0x3F, 0, stn_tlv),
SOC_DAPM_SINGLE_TLV("Sidetone DMIC1R Volume", LM49453_P0_STN_VOL_DMIC1R_REG,
		     0, 0x3F, 0, stn_tlv),
SOC_DAPM_SINGLE_TLV("Sidetone DMIC2L Volume", LM49453_P0_STN_VOL_DMIC2L_REG,
		     0, 0x3F, 0, stn_tlv),
SOC_DAPM_SINGLE_TLV("Sidetone DMIC2R Volume", LM49453_P0_STN_VOL_DMIC2R_REG,
		     0, 0x3F, 0, stn_tlv),
};

static const struct snd_kcontrol_new lm49453_snd_controls[] = {
	/* mic1 and mic2 supports mono only */
	SOC_SINGLE_TLV("Mic1 Volume", LM49453_P0_MICL_REG, 0, 15, 0, mic_tlv),
	SOC_SINGLE_TLV("Mic2 Volume", LM49453_P0_MICR_REG, 0, 15, 0, mic_tlv),

	SOC_SINGLE_TLV("ADCL Volume", LM49453_P0_ADC_LEVELL_REG, 0, 63,
			0, adc_dac_tlv),
	SOC_SINGLE_TLV("ADCR Volume", LM49453_P0_ADC_LEVELR_REG, 0, 63,
			0, adc_dac_tlv),

	SOC_DOUBLE_R_TLV("DMIC1 Volume", LM49453_P0_DMIC1_LEVELL_REG,
			  LM49453_P0_DMIC1_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
	SOC_DOUBLE_R_TLV("DMIC2 Volume", LM49453_P0_DMIC2_LEVELL_REG,
			  LM49453_P0_DMIC2_LEVELR_REG, 0, 63, 0, adc_dac_tlv),

	SOC_DAPM_ENUM("Mic2Mode", lm49453_mic2mode_enum),
	SOC_DAPM_ENUM("DMIC12 SRC", lm49453_dmic12_cfg_enum),
	SOC_DAPM_ENUM("DMIC34 SRC", lm49453_dmic34_cfg_enum),

	/* Capture path filter enable */
	SOC_SINGLE("DMIC1 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
					    0, 1, 0),
	SOC_SINGLE("DMIC2 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
					    1, 1, 0),
	SOC_SINGLE("ADC HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
					  2, 1, 0),

	SOC_DOUBLE_R_TLV("DAC HP Volume", LM49453_P0_DAC_HP_LEVELL_REG,
			  LM49453_P0_DAC_HP_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
	SOC_DOUBLE_R_TLV("DAC LO Volume", LM49453_P0_DAC_LO_LEVELL_REG,
			  LM49453_P0_DAC_LO_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
	SOC_DOUBLE_R_TLV("DAC LS Volume", LM49453_P0_DAC_LS_LEVELL_REG,
			  LM49453_P0_DAC_LS_LEVELR_REG, 0, 63, 0, adc_dac_tlv),
	SOC_DOUBLE_R_TLV("DAC HA Volume", LM49453_P0_DAC_HA_LEVELL_REG,
			  LM49453_P0_DAC_HA_LEVELR_REG, 0, 63, 0, adc_dac_tlv),

	SOC_SINGLE_TLV("EP Volume", LM49453_P0_DAC_LS_LEVELL_REG,
			0, 63, 0, adc_dac_tlv),

	SOC_SINGLE_TLV("PORT1_1_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
			0, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT1_2_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
			2, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT1_3_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
			4, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT1_4_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
			6, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT1_5_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
			0, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT1_6_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
			2, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT1_7_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
			4, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT1_8_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
			6, 3, 0, port_tlv),

	SOC_SINGLE_TLV("PORT2_1_RX_LVL Volume", LM49453_P0_PORT2_RX_LVL_REG,
			0, 3, 0, port_tlv),
	SOC_SINGLE_TLV("PORT2_2_RX_LVL Volume", LM49453_P0_PORT2_RX_LVL_REG,
			2, 3, 0, port_tlv),

	SOC_SINGLE("Port1 Playback Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
		    1, 1, 0),
	SOC_SINGLE("Port2 Playback Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
		    1, 1, 0),
	SOC_SINGLE("Port1 Capture Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
		    2, 1, 0),
	SOC_SINGLE("Port2 Capture Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
		    2, 1, 0)

};

/* DAPM widgets */
static const struct snd_soc_dapm_widget lm49453_dapm_widgets[] = {

	/* All end points HP,EP, LS, Lineout and Haptic */
	SND_SOC_DAPM_OUTPUT("HPOUTL"),
	SND_SOC_DAPM_OUTPUT("HPOUTR"),
	SND_SOC_DAPM_OUTPUT("EPOUT"),
	SND_SOC_DAPM_OUTPUT("LSOUTL"),
	SND_SOC_DAPM_OUTPUT("LSOUTR"),
	SND_SOC_DAPM_OUTPUT("LOOUTR"),
	SND_SOC_DAPM_OUTPUT("LOOUTL"),
	SND_SOC_DAPM_OUTPUT("HAOUTL"),
	SND_SOC_DAPM_OUTPUT("HAOUTR"),

	SND_SOC_DAPM_INPUT("AMIC1"),
	SND_SOC_DAPM_INPUT("AMIC2"),
	SND_SOC_DAPM_INPUT("DMIC1DAT"),
	SND_SOC_DAPM_INPUT("DMIC2DAT"),
	SND_SOC_DAPM_INPUT("AUXL"),
	SND_SOC_DAPM_INPUT("AUXR"),

	SND_SOC_DAPM_PGA("PORT1_1_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT1_2_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT1_3_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT1_4_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT1_5_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT1_6_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT1_7_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT1_8_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT2_1_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_PGA("PORT2_2_RX", SND_SOC_NOPM, 0, 0, NULL, 0),

	SND_SOC_DAPM_SUPPLY("AMIC1Bias", LM49453_P0_MICL_REG, 6, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("AMIC2Bias", LM49453_P0_MICR_REG, 6, 0, NULL, 0),

	/* playback path driver enables */
	SND_SOC_DAPM_OUT_DRV("Headset Switch",
			LM49453_P0_PMC_SETUP_REG, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("Earpiece Switch",
			LM49453_P0_EP_REG, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("Speaker Left Switch",
			LM49453_P0_DIS_PKVL_FB_REG, 0, 1, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("Speaker Right Switch",
			LM49453_P0_DIS_PKVL_FB_REG, 1, 1, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("Haptic Left Switch",
			LM49453_P0_DIS_PKVL_FB_REG, 2, 1, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("Haptic Right Switch",
			LM49453_P0_DIS_PKVL_FB_REG, 3, 1, NULL, 0),

	/* DAC */
	SND_SOC_DAPM_DAC("HPL DAC", "Headset", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_DAC("HPR DAC", "Headset", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_DAC("LSL DAC", "Speaker", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_DAC("LSR DAC", "Speaker", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_DAC("HAL DAC", "Haptic", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_DAC("HAR DAC", "Haptic", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_DAC("LOL DAC", "Lineout", SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_DAC("LOR DAC", "Lineout", SND_SOC_NOPM, 0, 0),


	SND_SOC_DAPM_PGA("AUXL Input",
			LM49453_P0_ANALOG_MIXER_ADC_REG, 2, 0, NULL, 0),
	SND_SOC_DAPM_PGA("AUXR Input",
			LM49453_P0_ANALOG_MIXER_ADC_REG, 3, 0, NULL, 0),

	SND_SOC_DAPM_PGA("Sidetone", SND_SOC_NOPM, 0, 0, NULL, 0),

	/* ADC */
	SND_SOC_DAPM_ADC("DMIC1 Left", "Capture", SND_SOC_NOPM, 1, 0),
	SND_SOC_DAPM_ADC("DMIC1 Right", "Capture", SND_SOC_NOPM, 1, 0),
	SND_SOC_DAPM_ADC("DMIC2 Left", "Capture", SND_SOC_NOPM, 1, 0),
	SND_SOC_DAPM_ADC("DMIC2 Right", "Capture", SND_SOC_NOPM, 1, 0),

	SND_SOC_DAPM_ADC("ADC Left", "Capture", SND_SOC_NOPM, 1, 0),
	SND_SOC_DAPM_ADC("ADC Right", "Capture", SND_SOC_NOPM, 0, 0),

	SND_SOC_DAPM_MUX("ADCL Mux", SND_SOC_NOPM, 0, 0,
			  &lm49453_adcl_mux_control),
	SND_SOC_DAPM_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0,
			  &lm49453_adcr_mux_control),

	SND_SOC_DAPM_MUX("Mic1 Input",
			SND_SOC_NOPM, 0, 0, &lm49453_adcl_mux_control),

	SND_SOC_DAPM_MUX("Mic2 Input",
			SND_SOC_NOPM, 0, 0, &lm49453_adcr_mux_control),

	/* AIF */
	SND_SOC_DAPM_AIF_IN("PORT1_SDI", NULL, 0,
			    LM49453_P0_PULL_CONFIG1_REG, 2, 0),
	SND_SOC_DAPM_AIF_IN("PORT2_SDI", NULL, 0,
			    LM49453_P0_PULL_CONFIG1_REG, 6, 0),

	SND_SOC_DAPM_AIF_OUT("PORT1_SDO", NULL, 0,
			     LM49453_P0_PULL_CONFIG1_REG, 3, 0),
	SND_SOC_DAPM_AIF_OUT("PORT2_SDO", NULL, 0,
			      LM49453_P0_PULL_CONFIG1_REG, 7, 0),

	/* Port1 TX controls */
	SND_SOC_DAPM_OUT_DRV("P1_1_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P1_2_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P1_3_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P1_4_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P1_5_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P1_6_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P1_7_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P1_8_TX", SND_SOC_NOPM, 0, 0, NULL, 0),

	/* Port2 TX controls */
	SND_SOC_DAPM_OUT_DRV("P2_1_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
	SND_SOC_DAPM_OUT_DRV("P2_2_TX", SND_SOC_NOPM, 0, 0, NULL, 0),

	/* Sidetone Mixer */
	SND_SOC_DAPM_MIXER("Sidetone Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_sidetone_mixer_controls,
			    ARRAY_SIZE(lm49453_sidetone_mixer_controls)),

	/* DAC MIXERS */
	SND_SOC_DAPM_MIXER("HPL Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_headset_left_mixer,
			    ARRAY_SIZE(lm49453_headset_left_mixer)),
	SND_SOC_DAPM_MIXER("HPR Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_headset_right_mixer,
			    ARRAY_SIZE(lm49453_headset_right_mixer)),
	SND_SOC_DAPM_MIXER("LOL Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_lineout_left_mixer,
			    ARRAY_SIZE(lm49453_lineout_left_mixer)),
	SND_SOC_DAPM_MIXER("LOR Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_lineout_right_mixer,
			    ARRAY_SIZE(lm49453_lineout_right_mixer)),
	SND_SOC_DAPM_MIXER("LSL Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_speaker_left_mixer,
			    ARRAY_SIZE(lm49453_speaker_left_mixer)),
	SND_SOC_DAPM_MIXER("LSR Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_speaker_right_mixer,
			    ARRAY_SIZE(lm49453_speaker_right_mixer)),
	SND_SOC_DAPM_MIXER("HAL Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_haptic_left_mixer,
			    ARRAY_SIZE(lm49453_haptic_left_mixer)),
	SND_SOC_DAPM_MIXER("HAR Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_haptic_right_mixer,
			    ARRAY_SIZE(lm49453_haptic_right_mixer)),

	/* Capture Mixer */
	SND_SOC_DAPM_MIXER("Port1_1 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx1_mixer,
			    ARRAY_SIZE(lm49453_port1_tx1_mixer)),
	SND_SOC_DAPM_MIXER("Port1_2 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx2_mixer,
			    ARRAY_SIZE(lm49453_port1_tx2_mixer)),
	SND_SOC_DAPM_MIXER("Port1_3 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx3_mixer,
			    ARRAY_SIZE(lm49453_port1_tx3_mixer)),
	SND_SOC_DAPM_MIXER("Port1_4 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx4_mixer,
			    ARRAY_SIZE(lm49453_port1_tx4_mixer)),
	SND_SOC_DAPM_MIXER("Port1_5 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx5_mixer,
			    ARRAY_SIZE(lm49453_port1_tx5_mixer)),
	SND_SOC_DAPM_MIXER("Port1_6 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx6_mixer,
			    ARRAY_SIZE(lm49453_port1_tx6_mixer)),
	SND_SOC_DAPM_MIXER("Port1_7 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx7_mixer,
			    ARRAY_SIZE(lm49453_port1_tx7_mixer)),
	SND_SOC_DAPM_MIXER("Port1_8 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port1_tx8_mixer,
			    ARRAY_SIZE(lm49453_port1_tx8_mixer)),

	SND_SOC_DAPM_MIXER("Port2_1 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port2_tx1_mixer,
			    ARRAY_SIZE(lm49453_port2_tx1_mixer)),
	SND_SOC_DAPM_MIXER("Port2_2 Mixer", SND_SOC_NOPM, 0, 0,
			    lm49453_port2_tx2_mixer,
			    ARRAY_SIZE(lm49453_port2_tx2_mixer)),
};

static const struct snd_soc_dapm_route lm49453_audio_map[] = {
	/* Port SDI mapping */
	{ "PORT1_1_RX", "Port1 Playback Switch", "PORT1_SDI" },
	{ "PORT1_2_RX", "Port1 Playback Switch", "PORT1_SDI" },
	{ "PORT1_3_RX", "Port1 Playback Switch", "PORT1_SDI" },
	{ "PORT1_4_RX", "Port1 Playback Switch", "PORT1_SDI" },
	{ "PORT1_5_RX", "Port1 Playback Switch", "PORT1_SDI" },
	{ "PORT1_6_RX", "Port1 Playback Switch", "PORT1_SDI" },
	{ "PORT1_7_RX", "Port1 Playback Switch", "PORT1_SDI" },
	{ "PORT1_8_RX", "Port1 Playback Switch", "PORT1_SDI" },

	{ "PORT2_1_RX", "Port2 Playback Switch", "PORT2_SDI" },
	{ "PORT2_2_RX", "Port2 Playback Switch", "PORT2_SDI" },

	/* HP mapping */
	{ "HPL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "HPL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "HPL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "HPL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "HPL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "HPL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "HPL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "HPL Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	{ "HPL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "HPL Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "HPL Mixer", "ADCL Switch", "ADC Left" },
	{ "HPL Mixer", "ADCR Switch", "ADC Right" },
	{ "HPL Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "HPL Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "HPL Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "HPL Mixer", "DMIC2R Switch", "DMIC2 Right" },
	{ "HPL Mixer", "Sidetone Switch", "Sidetone" },

	{ "HPL DAC", NULL, "HPL Mixer" },

	{ "HPR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "HPR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "HPR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "HPR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "HPR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "HPR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "HPR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "HPR Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	/* Port 2 */
	{ "HPR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "HPR Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "HPR Mixer", "ADCL Switch", "ADC Left" },
	{ "HPR Mixer", "ADCR Switch", "ADC Right" },
	{ "HPR Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "HPR Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "HPR Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "HPR Mixer", "DMIC2L Switch", "DMIC2 Right" },
	{ "HPR Mixer", "Sidetone Switch", "Sidetone" },

	{ "HPR DAC", NULL, "HPR Mixer" },

	{ "HPOUTL", "Headset Switch", "HPL DAC"},
	{ "HPOUTR", "Headset Switch", "HPR DAC"},

	/* EP map */
	{ "EPOUT", "Earpiece Switch", "HPL DAC" },

	/* Speaker map */
	{ "LSL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "LSL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "LSL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "LSL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "LSL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "LSL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "LSL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "LSL Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	/* Port 2 */
	{ "LSL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "LSL Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "LSL Mixer", "ADCL Switch", "ADC Left" },
	{ "LSL Mixer", "ADCR Switch", "ADC Right" },
	{ "LSL Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "LSL Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "LSL Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "LSL Mixer", "DMIC2R Switch", "DMIC2 Right" },
	{ "LSL Mixer", "Sidetone Switch", "Sidetone" },

	{ "LSL DAC", NULL, "LSL Mixer" },

	{ "LSR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "LSR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "LSR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "LSR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "LSR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "LSR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "LSR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "LSR Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	/* Port 2 */
	{ "LSR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "LSR Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "LSR Mixer", "ADCL Switch", "ADC Left" },
	{ "LSR Mixer", "ADCR Switch", "ADC Right" },
	{ "LSR Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "LSR Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "LSR Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "LSR Mixer", "DMIC2R Switch", "DMIC2 Right" },
	{ "LSR Mixer", "Sidetone Switch", "Sidetone" },

	{ "LSR DAC", NULL, "LSR Mixer" },

	{ "LSOUTL", "Speaker Left Switch", "LSL DAC"},
	{ "LSOUTR", "Speaker Left Switch", "LSR DAC"},

	/* Haptic map */
	{ "HAL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "HAL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "HAL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "HAL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "HAL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "HAL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "HAL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "HAL Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	/* Port 2 */
	{ "HAL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "HAL Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "HAL Mixer", "ADCL Switch", "ADC Left" },
	{ "HAL Mixer", "ADCR Switch", "ADC Right" },
	{ "HAL Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "HAL Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "HAL Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "HAL Mixer", "DMIC2R Switch", "DMIC2 Right" },
	{ "HAL Mixer", "Sidetone Switch", "Sidetone" },

	{ "HAL DAC", NULL, "HAL Mixer" },

	{ "HAR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "HAR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "HAR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "HAR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "HAR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "HAR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "HAR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "HAR Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	/* Port 2 */
	{ "HAR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "HAR Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "HAR Mixer", "ADCL Switch", "ADC Left" },
	{ "HAR Mixer", "ADCR Switch", "ADC Right" },
	{ "HAR Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "HAR Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "HAR Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "HAR Mixer", "DMIC2R Switch", "DMIC2 Right" },
	{ "HAR Mixer", "Sideton Switch", "Sidetone" },

	{ "HAR DAC", NULL, "HAR Mixer" },

	{ "HAOUTL", "Haptic Left Switch", "HAL DAC" },
	{ "HAOUTR", "Haptic Right Switch", "HAR DAC" },

	/* Lineout map */
	{ "LOL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "LOL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "LOL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "LOL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "LOL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "LOL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "LOL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "LOL Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	/* Port 2 */
	{ "LOL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "LOL Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "LOL Mixer", "ADCL Switch", "ADC Left" },
	{ "LOL Mixer", "ADCR Switch", "ADC Right" },
	{ "LOL Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "LOL Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "LOL Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "LOL Mixer", "DMIC2R Switch", "DMIC2 Right" },
	{ "LOL Mixer", "Sidetone Switch", "Sidetone" },

	{ "LOL DAC", NULL, "LOL Mixer" },

	{ "LOR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
	{ "LOR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
	{ "LOR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
	{ "LOR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
	{ "LOR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
	{ "LOR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
	{ "LOR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
	{ "LOR Mixer", "Port1_8 Switch", "PORT1_8_RX" },

	/* Port 2 */
	{ "LOR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
	{ "LOR Mixer", "Port2_2 Switch", "PORT2_2_RX" },

	{ "LOR Mixer", "ADCL Switch", "ADC Left" },
	{ "LOR Mixer", "ADCR Switch", "ADC Right" },
	{ "LOR Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "LOR Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "LOR Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "LOR Mixer", "DMIC2R Switch", "DMIC2 Right" },
	{ "LOR Mixer", "Sidetone Switch", "Sidetone" },

	{ "LOR DAC", NULL, "LOR Mixer" },

	{ "LOOUTL", NULL, "LOL DAC" },
	{ "LOOUTR", NULL, "LOR DAC" },

	/* TX map */
	/* Port1 mappings */
	{ "Port1_1 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_1 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port1_2 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_2 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port1_3 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_3 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_3 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_3 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_3 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_3 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port1_4 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_4 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_4 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_4 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_4 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_4 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port1_5 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_5 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_5 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_5 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_5 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_5 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port1_6 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_6 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_6 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_6 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_6 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_6 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port1_7 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_7 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_7 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_7 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_7 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_7 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port1_8 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port1_8 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port1_8 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port1_8 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port1_8 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port1_8 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port2_1 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port2_1 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port2_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port2_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port2_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port2_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "Port2_2 Mixer", "ADCL Switch", "ADC Left" },
	{ "Port2_2 Mixer", "ADCR Switch", "ADC Right" },
	{ "Port2_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
	{ "Port2_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
	{ "Port2_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
	{ "Port2_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },

	{ "P1_1_TX", NULL, "Port1_1 Mixer" },
	{ "P1_2_TX", NULL, "Port1_2 Mixer" },
	{ "P1_3_TX", NULL, "Port1_3 Mixer" },
	{ "P1_4_TX", NULL, "Port1_4 Mixer" },
	{ "P1_5_TX", NULL, "Port1_5 Mixer" },
	{ "P1_6_TX", NULL, "Port1_6 Mixer" },
	{ "P1_7_TX", NULL, "Port1_7 Mixer" },
	{ "P1_8_TX", NULL, "Port1_8 Mixer" },

	{ "P2_1_TX", NULL, "Port2_1 Mixer" },
	{ "P2_2_TX", NULL, "Port2_2 Mixer" },

	{ "PORT1_SDO", "Port1 Capture Switch", "P1_1_TX"},
	{ "PORT1_SDO", "Port1 Capture Switch", "P1_2_TX"},
	{ "PORT1_SDO", "Port1 Capture Switch", "P1_3_TX"},
	{ "PORT1_SDO", "Port1 Capture Switch", "P1_4_TX"},
	{ "PORT1_SDO", "Port1 Capture Switch", "P1_5_TX"},
	{ "PORT1_SDO", "Port1 Capture Switch", "P1_6_TX"},
	{ "PORT1_SDO", "Port1 Capture Switch", "P1_7_TX"},
	{ "PORT1_SDO", "Port1 Capture Switch", "P1_8_TX"},

	{ "PORT2_SDO", "Port2 Capture Switch", "P2_1_TX"},
	{ "PORT2_SDO", "Port2 Capture Switch", "P2_2_TX"},

	{ "Mic1 Input", NULL, "AMIC1" },
	{ "Mic2 Input", NULL, "AMIC2" },

	{ "AUXL Input", NULL, "AUXL" },
	{ "AUXR Input", NULL, "AUXR" },

	/* AUX connections */
	{ "ADCL Mux", "Aux_L", "AUXL Input" },
	{ "ADCL Mux", "MIC1", "Mic1 Input" },

	{ "ADCR Mux", "Aux_R", "AUXR Input" },
	{ "ADCR Mux", "MIC2", "Mic2 Input" },

	/* ADC connection */
	{ "ADC Left", NULL, "ADCL Mux"},
	{ "ADC Right", NULL, "ADCR Mux"},

	{ "DMIC1 Left", NULL, "DMIC1DAT"},
	{ "DMIC1 Right", NULL, "DMIC1DAT"},
	{ "DMIC2 Left", NULL, "DMIC2DAT"},
	{ "DMIC2 Right", NULL, "DMIC2DAT"},

	/* Sidetone map */
	{ "Sidetone Mixer", NULL, "ADC Left" },
	{ "Sidetone Mixer", NULL, "ADC Right" },
	{ "Sidetone Mixer", NULL, "DMIC1 Left" },
	{ "Sidetone Mixer", NULL, "DMIC1 Right" },
	{ "Sidetone Mixer", NULL, "DMIC2 Left" },
	{ "Sidetone Mixer", NULL, "DMIC2 Right" },

	{ "Sidetone", "Sidetone Switch", "Sidetone Mixer" },
};

static int lm49453_hw_params(struct snd_pcm_substream *substream,
			     struct snd_pcm_hw_params *params,
			     struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct lm49453_priv *lm49453 = snd_soc_codec_get_drvdata(codec);
	u16 clk_div = 0;

	lm49453->fs_rate = params_rate(params);

	/* Setting DAC clock dividers based on substream sample rate. */
	switch (lm49453->fs_rate) {
	case 8000:
	case 16000:
	case 32000:
	case 24000:
	case 48000:
		clk_div = 256;
		break;
	case 11025:
	case 22050:
	case 44100:
		clk_div = 216;
		break;
	case 96000:
		clk_div = 127;
		break;
	default:
		return -EINVAL;
	}

	snd_soc_write(codec, LM49453_P0_ADC_CLK_DIV_REG, clk_div);
	snd_soc_write(codec, LM49453_P0_DAC_HP_CLK_DIV_REG, clk_div);

	return 0;
}

static int lm49453_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = codec_dai->codec;

	u16 aif_val;
	int mode = 0;
	int clk_phase = 0;
	int clk_shift = 0;

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBS_CFS:
		aif_val = 0;
		break;
	case SND_SOC_DAIFMT_CBS_CFM:
		aif_val = LM49453_AUDIO_PORT1_BASIC_SYNC_MS;
		break;
	case SND_SOC_DAIFMT_CBM_CFS:
		aif_val = LM49453_AUDIO_PORT1_BASIC_CLK_MS;
		break;
	case SND_SOC_DAIFMT_CBM_CFM:
		aif_val = LM49453_AUDIO_PORT1_BASIC_CLK_MS |
			  LM49453_AUDIO_PORT1_BASIC_SYNC_MS;
		break;
	default:
		return -EINVAL;
	}


	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		break;
	case SND_SOC_DAIFMT_DSP_A:
		mode = 1;
		clk_phase = (1 << 5);
		clk_shift = 1;
		break;
	case SND_SOC_DAIFMT_DSP_B:
		mode = 1;
		clk_phase = (1 << 5);
		clk_shift = 0;
		break;
	default:
		return -EINVAL;
	}

	snd_soc_update_bits(codec, LM49453_P0_AUDIO_PORT1_BASIC_REG,
			    LM49453_AUDIO_PORT1_BASIC_FMT_MASK|BIT(0)|BIT(5),
			    (aif_val | mode | clk_phase));

	snd_soc_write(codec, LM49453_P0_AUDIO_PORT1_RX_MSB_REG, clk_shift);

	return 0;
}

static int lm49453_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
				  unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = dai->codec;
	u16 pll_clk = 0;

	switch (freq) {
	case 12288000:
	case 26000000:
	case 19200000:
		/* pll clk slection */
		pll_clk = 0;
		break;
	case 48000:
	case 32576:
		/* fll clk slection */
		pll_clk = BIT(4);
		return 0;
	default:
		return -EINVAL;
	}

	snd_soc_update_bits(codec, LM49453_P0_PMC_SETUP_REG, BIT(4), pll_clk);

	return 0;
}

static int lm49453_hp_mute(struct snd_soc_dai *dai, int mute)
{
	snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(1)|BIT(0),
			    (mute ? (BIT(1)|BIT(0)) : 0));
	return 0;
}

static int lm49453_lo_mute(struct snd_soc_dai *dai, int mute)
{
	snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(3)|BIT(2),
			    (mute ? (BIT(3)|BIT(2)) : 0));
	return 0;
}

static int lm49453_ls_mute(struct snd_soc_dai *dai, int mute)
{
	snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(5)|BIT(4),
			    (mute ? (BIT(5)|BIT(4)) : 0));
	return 0;
}

static int lm49453_ep_mute(struct snd_soc_dai *dai, int mute)
{
	snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(4),
			    (mute ? BIT(4) : 0));
	return 0;
}

static int lm49453_ha_mute(struct snd_soc_dai *dai, int mute)
{
	snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(7)|BIT(6),
			    (mute ? (BIT(7)|BIT(6)) : 0));
	return 0;
}

static int lm49453_set_bias_level(struct snd_soc_codec *codec,
				  enum snd_soc_bias_level level)
{
	struct lm49453_priv *lm49453 = snd_soc_codec_get_drvdata(codec);

	switch (level) {
	case SND_SOC_BIAS_ON:
	case SND_SOC_BIAS_PREPARE:
		break;

	case SND_SOC_BIAS_STANDBY:
		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
			regcache_sync(lm49453->regmap);

		snd_soc_update_bits(codec, LM49453_P0_PMC_SETUP_REG,
				    LM49453_PMC_SETUP_CHIP_EN, LM49453_CHIP_EN);
		break;

	case SND_SOC_BIAS_OFF:
		snd_soc_update_bits(codec, LM49453_P0_PMC_SETUP_REG,
				    LM49453_PMC_SETUP_CHIP_EN, 0);
		break;
	}

	codec->dapm.bias_level = level;

	return 0;
}

/* Formates supported by LM49453 driver. */
#define LM49453_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
			 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)

static struct snd_soc_dai_ops lm49453_headset_dai_ops = {
	.hw_params	= lm49453_hw_params,
	.set_sysclk	= lm49453_set_dai_sysclk,
	.set_fmt	= lm49453_set_dai_fmt,
	.digital_mute	= lm49453_hp_mute,
};

static struct snd_soc_dai_ops lm49453_speaker_dai_ops = {
	.hw_params	= lm49453_hw_params,
	.set_sysclk	= lm49453_set_dai_sysclk,
	.set_fmt	= lm49453_set_dai_fmt,
	.digital_mute	= lm49453_ls_mute,
};

static struct snd_soc_dai_ops lm49453_haptic_dai_ops = {
	.hw_params	= lm49453_hw_params,
	.set_sysclk	= lm49453_set_dai_sysclk,
	.set_fmt	= lm49453_set_dai_fmt,
	.digital_mute	= lm49453_ha_mute,
};

static struct snd_soc_dai_ops lm49453_ep_dai_ops = {
	.hw_params	= lm49453_hw_params,
	.set_sysclk	= lm49453_set_dai_sysclk,
	.set_fmt	= lm49453_set_dai_fmt,
	.digital_mute	= lm49453_ep_mute,
};

static struct snd_soc_dai_ops lm49453_lineout_dai_ops = {
	.hw_params	= lm49453_hw_params,
	.set_sysclk	= lm49453_set_dai_sysclk,
	.set_fmt	= lm49453_set_dai_fmt,
	.digital_mute	= lm49453_lo_mute,
};

/* LM49453 dai structure. */
static struct snd_soc_dai_driver lm49453_dai[] = {
	{
		.name = "LM49453 Headset",
		.playback = {
			.stream_name = "Headset",
			.channels_min = 2,
			.channels_max = 2,
			.rates = SNDRV_PCM_RATE_8000_192000,
			.formats = LM49453_FORMATS,
		},
		.capture = {
			.stream_name = "Capture",
			.channels_min = 1,
			.channels_max = 5,
			.rates = SNDRV_PCM_RATE_8000_192000,
			.formats = LM49453_FORMATS,
		},
		.ops = &lm49453_headset_dai_ops,
		.symmetric_rates = 1,
	},
	{
		.name = "LM49453 Speaker",
		.playback = {
			.stream_name = "Speaker",
			.channels_min = 2,
			.channels_max = 2,
			.rates = SNDRV_PCM_RATE_8000_192000,
			.formats = LM49453_FORMATS,
		},
		.ops = &lm49453_speaker_dai_ops,
	},
	{
		.name = "LM49453 Haptic",
		.playback = {
			.stream_name = "Haptic",
			.channels_min = 2,
			.channels_max = 2,
			.rates = SNDRV_PCM_RATE_8000_192000,
			.formats = LM49453_FORMATS,
		},
		.ops = &lm49453_haptic_dai_ops,
	},
	{
		.name = "LM49453 Earpiece",
		.playback = {
			.stream_name = "Earpiece",
			.channels_min = 1,
			.channels_max = 1,
			.rates = SNDRV_PCM_RATE_8000_192000,
			.formats = LM49453_FORMATS,
		},
		.ops = &lm49453_ep_dai_ops,
	},
	{
		.name = "LM49453 line out",
		.playback = {
			.stream_name = "Lineout",
			.channels_min = 2,
			.channels_max = 2,
			.rates = SNDRV_PCM_RATE_8000_192000,
			.formats = LM49453_FORMATS,
		},
		.ops = &lm49453_lineout_dai_ops,
	},
};

static int lm49453_suspend(struct snd_soc_codec *codec)
{
	lm49453_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static int lm49453_resume(struct snd_soc_codec *codec)
{
	lm49453_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	return 0;
}

static int lm49453_probe(struct snd_soc_codec *codec)
{
	struct lm49453_priv *lm49453 = snd_soc_codec_get_drvdata(codec);
	int ret = 0;

	codec->control_data = lm49453->regmap;

	ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		return ret;
	}

	return 0;
}

/* power down chip */
static int lm49453_remove(struct snd_soc_codec *codec)
{
	lm49453_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_lm49453 = {
	.probe = lm49453_probe,
	.remove = lm49453_remove,
	.suspend = lm49453_suspend,
	.resume = lm49453_resume,
	.set_bias_level = lm49453_set_bias_level,
	.controls = lm49453_snd_controls,
	.num_controls = ARRAY_SIZE(lm49453_snd_controls),
	.dapm_widgets = lm49453_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(lm49453_dapm_widgets),
	.dapm_routes = lm49453_audio_map,
	.num_dapm_routes = ARRAY_SIZE(lm49453_audio_map),
	.idle_bias_off = true,
};

static const struct regmap_config lm49453_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,

	.max_register = LM49453_MAX_REGISTER,
	.reg_defaults = lm49453_reg_defs,
	.num_reg_defaults = ARRAY_SIZE(lm49453_reg_defs),
	.cache_type = REGCACHE_RBTREE,
};

static int lm49453_i2c_probe(struct i2c_client *i2c,
			     const struct i2c_device_id *id)
{
	struct lm49453_priv *lm49453;
	int ret = 0;

	lm49453 = devm_kzalloc(&i2c->dev, sizeof(struct lm49453_priv),
				GFP_KERNEL);

	if (lm49453 == NULL)
		return -ENOMEM;

	i2c_set_clientdata(i2c, lm49453);

	lm49453->regmap = devm_regmap_init_i2c(i2c, &lm49453_regmap_config);
	if (IS_ERR(lm49453->regmap)) {
		ret = PTR_ERR(lm49453->regmap);
		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
			ret);
		return ret;
	}

	ret =  snd_soc_register_codec(&i2c->dev,
				      &soc_codec_dev_lm49453,
				      lm49453_dai, ARRAY_SIZE(lm49453_dai));
	if (ret < 0)
		dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);

	return ret;
}

static int lm49453_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	return 0;
}

static const struct i2c_device_id lm49453_i2c_id[] = {
	{ "lm49453", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, lm49453_i2c_id);

static struct i2c_driver lm49453_i2c_driver = {
	.driver = {
		.name = "lm49453",
		.owner = THIS_MODULE,
	},
	.probe = lm49453_i2c_probe,
	.remove = lm49453_i2c_remove,
	.id_table = lm49453_i2c_id,
};

module_i2c_driver(lm49453_i2c_driver);

MODULE_DESCRIPTION("ASoC LM49453 driver");
MODULE_AUTHOR("M R Swami Reddy <MR.Swami.Reddy@ti.com>");
MODULE_LICENSE("GPL v2");