path: root/include/linux/mfd/wm8400-private.h

/*
 * wm8400 private definitions.
 *
 * Copyright 2008 Wolfson Microelectronics plc
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef __LINUX_MFD_WM8400_PRIV_H
#define __LINUX_MFD_WM8400_PRIV_H

#include <linux/mfd/wm8400.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>

#define WM8400_REGISTER_COUNT 0x55

struct wm8400 {
	struct device *dev;

	int (*read_dev)(void *data, char reg, int count, u16 *dst);
	int (*write_dev)(void *data, char reg, int count, const u16 *src);

	struct mutex io_lock;
	void *io_data;

	u16 reg_cache[WM8400_REGISTER_COUNT];

	struct platform_device regulators[6];
};

/*
 * Register values.
 */
#define WM8400_RESET_ID                         0x00
#define WM8400_ID                               0x01
#define WM8400_POWER_MANAGEMENT_1               0x02
#define WM8400_POWER_MANAGEMENT_2               0x03
#define WM8400_POWER_MANAGEMENT_3               0x04
#define WM8400_AUDIO_INTERFACE_1                0x05
#define WM8400_AUDIO_INTERFACE_2                0x06
#define WM8400_CLOCKING_1                       0x07
#define WM8400_CLOCKING_2                       0x08
#define WM8400_AUDIO_INTERFACE_3                0x09
#define WM8400_AUDIO_INTERFACE_4                0x0A
#define WM8400_DAC_CTRL                         0x0B
#define WM8400_LEFT_DAC_DIGITAL_VOLUME          0x0C
#define WM8400_RIGHT_DAC_DIGITAL_VOLUME         0x0D
#define WM8400_DIGITAL_SIDE_TONE                0x0E
#define WM8400_ADC_CTRL                         0x0F
#define WM8400_LEFT_ADC_DIGITAL_VOLUME          0x10
#define WM8400_RIGHT_ADC_DIGITAL_VOLUME         0x11
#define WM8400_GPIO_CTRL_1                      0x12
#define WM8400_GPIO1_GPIO2                      0x13
#define WM8400_GPIO3_GPIO4                      0x14
#define WM8400_GPIO5_GPIO6                      0x15
#define WM8400_GPIOCTRL_2                       0x16
#define WM8400_GPIO_POL                         0x17
#define WM8400_LEFT_LINE_INPUT_1_2_VOLUME       0x18
#define WM8400_LEFT_LINE_INPUT_3_4_VOLUME       0x19
#define WM8400_RIGHT_LINE_INPUT_1_2_VOLUME      0x1A
#define WM8400_RIGHT_LINE_INPUT_3_4_VOLUME      0x1B
#define WM8400_LEFT_OUTPUT_VOLUME               0x1C
#define WM8400_RIGHT_OUTPUT_VOLUME              0x1D
#define WM8400_LINE_OUTPUTS_VOLUME              0x1E
#define WM8400_OUT3_4_VOLUME                    0x1F
#define WM8400_LEFT_OPGA_VOLUME                 0x20
#define WM8400_RIGHT_OPGA_VOLUME                0x21
#define WM8400_SPEAKER_VOLUME                   0x22
#define WM8400_CLASSD1                          0x23
#define WM8400_CLASSD3                          0x25
#define WM8400_INPUT_MIXER1                     0x27
#define WM8400_INPUT_MIXER2                     0x28
#define WM8400_INPUT_MIXER3                     0x29
#define WM8400_INPUT_MIXER4                     0x2A
#define WM8400_INPUT_MIXER5                     0x2B
#define WM8400_INPUT_MIXER6                     0x2C
#define WM8400_OUTPUT_MIXER1                    0x2D
#define WM8400_OUTPUT_MIXER2                    0x2E
#define WM8400_OUTPUT_MIXER3                    0x2F
#define WM8400_OUTPUT_MIXER4                    0x30
#define WM8400_OUTPUT_MIXER5                    0x31
#define WM8400_OUTPUT_MIXER6                    0x32
#define WM8400_OUT3_4_MIXER                     0x33
#define WM8400_LINE_MIXER1                      0x34
#define WM8400_LINE_MIXER2                      0x35
#define WM8400_SPEAKER_MIXER                    0x36
#define WM8400_ADDITIONAL_CONTROL               0x37
#define WM8400_ANTIPOP1                         0x38
#define WM8400_ANTIPOP2                         0x39
#define WM8400_MICBIAS                          0x3A
#define WM8400_FLL_CONTROL_1                    0x3C
#define WM8400_FLL_CONTROL_2                    0x3D
#define WM8400_FLL_CONTROL_3                    0x3E
#define WM8400_FLL_CONTROL_4                    0x3F
#define WM8400_LDO1_CONTROL                     0x41
#define WM8400_LDO2_CONTROL                     0x42
#define WM8400_LDO3_CONTROL                     0x43
#define WM8400_LDO4_CONTROL                     0x44
#define WM8400_DCDC1_CONTROL_1                  0x46
#define WM8400_DCDC1_CONTROL_2                  0x47
#define WM8400_DCDC2_CONTROL_1                  0x48
#define WM8400_DCDC2_CONTROL_2                  0x49
#define WM8400_INTERFACE                        0x4B
#define WM8400_PM_GENERAL                       0x4C
#define WM8400_PM_SHUTDOWN_CONTROL              0x4E
#define WM8400_INTERRUPT_STATUS_1               0x4F
#define WM8400_INTERRUPT_STATUS_1_MASK          0x50
#define WM8400_INTERRUPT_LEVELS                 0x51
#define WM8400_SHUTDOWN_REASON                  0x52
#define WM8400_LINE_CIRCUITS                    0x54

/*
 * Field Definitions.
 */

/*
 * R0 (0x00) - Reset/ID
 */
#define WM8400_SW_RESET_CHIP_ID_MASK            0xFFFF  /* SW_RESET/CHIP_ID - [15:0] */
#define WM8400_SW_RESET_CHIP_ID_SHIFT                0  /* SW_RESET/CHIP_ID - [15:0] */
#define WM8400_SW_RESET_CHIP_ID_WIDTH               16  /* SW_RESET/CHIP_ID - [15:0] */

/*
 * R1 (0x01) - ID
 */
#define WM8400_CHIP_REV_MASK                    0x7000  /* CHIP_REV - [14:12] */
#define WM8400_CHIP_REV_SHIFT                       12  /* CHIP_REV - [14:12] */
#define WM8400_CHIP_REV_WIDTH                        3  /* CHIP_REV - [14:12] */

/*
 * R18 (0x12) - GPIO CTRL 1
 */
#define WM8400_IRQ                              0x1000  /* IRQ */
#define WM8400_IRQ_MASK                         0x1000  /* IRQ */
#define WM8400_IRQ_SHIFT                            12  /* IRQ */
#define WM8400_IRQ_WIDTH                             1  /* IRQ */
#define WM8400_TEMPOK                           0x0800  /* TEMPOK */
#define WM8400_TEMPOK_MASK                      0x0800  /* TEMPOK */
#define WM8400_TEMPOK_SHIFT                         11  /* TEMPOK */
#define WM8400_TEMPOK_WIDTH                          1  /* TEMPOK */
#define WM8400_MIC1SHRT                         0x0400  /* MIC1SHRT */
#define WM8400_MIC1SHRT_MASK                    0x0400  /* MIC1SHRT */
#define WM8400_MIC1SHRT_SHIFT                       10  /* MIC1SHRT */
#define WM8400_MIC1SHRT_WIDTH                        1  /* MIC1SHRT */
#define WM8400_MIC1DET                          0x0200  /* MIC1DET */
#define WM8400_MIC1DET_MASK                     0x0200  /* MIC1DET */
#define WM8400_MIC1DET_SHIFT                         9  /* MIC1DET */
#define WM8400_MIC1DET_WIDTH                         1  /* MIC1DET */
#define WM8400_FLL_LCK                          0x0100  /* FLL_LCK */
#define WM8400_FLL_LCK_MASK                     0x0100  /* FLL_LCK */
#define WM8400_FLL_LCK_SHIFT                         8  /* FLL_LCK */
#define WM8400_FLL_LCK_WIDTH                         1  /* FLL_LCK */
#define WM8400_GPIO_STATUS_MASK                 0x00FF  /* GPIO_STATUS - [7:0] */
#define WM8400_GPIO_STATUS_SHIFT                     0  /* GPIO_STATUS - [7:0] */
#define WM8400_GPIO_STATUS_WIDTH                     8  /* GPIO_STATUS - [7:0] */

/*
 * R19 (0x13) - GPIO1 & GPIO2
 */
#define WM8400_GPIO2_DEB_ENA                    0x8000  /* GPIO2_DEB_ENA */
#define WM8400_GPIO2_DEB_ENA_MASK               0x8000  /* GPIO2_DEB_ENA */
#define WM8400_GPIO2_DEB_ENA_SHIFT                  15  /* GPIO2_DEB_ENA */
#define WM8400_GPIO2_DEB_ENA_WIDTH                   1  /* GPIO2_DEB_ENA */
#define WM8400_GPIO2_IRQ_ENA                    0x4000  /* GPIO2_IRQ_ENA */
#define WM8400_GPIO2_IRQ_ENA_MASK               0x4000  /* GPIO2_IRQ_ENA */
#define WM8400_GPIO2_IRQ_ENA_SHIFT                  14  /* GPIO2_IRQ_ENA */
#define WM8400_GPIO2_IRQ_ENA_WIDTH                   1  /* GPIO2_IRQ_ENA */
#define WM8400_GPIO2_PU                         0x2000  /* GPIO2_PU */
#define WM8400_GPIO2_PU_MASK                    0x2000  /* GPIO2_PU */
#define WM8400_GPIO2_PU_SHIFT                       13  /* GPIO2_PU */
#define WM8400_GPIO2_PU_WIDTH                        1  /* GPIO2_PU */
#define WM8400_GPIO2_PD                         0x1000  /* GPIO2_PD */
#define WM8400_GPIO2_PD_MASK                    0x1000  /* GPIO2_PD */
#define WM8400_GPIO2_PD_SHIFT                       12  /* GPIO2_PD */
#define WM8400_GPIO2_PD_WIDTH                        1  /* GPIO2_PD */
#define WM8400_GPIO2_SEL_MASK                   0x0F00  /* GPIO2_SEL - [11:8] */
#define WM8400_GPIO2_SEL_SHIFT                       8  /* GPIO2_SEL - [11:8] */
#define WM8400_GPIO2_SEL_WIDTH                       4  /* GPIO2_SEL - [11:8] */
#define WM8400_GPIO1_DEB_ENA                    0x0080  /* GPIO1_DEB_ENA */
#define WM8400_GPIO1_DEB_ENA_MASK               0x0080  /* GPIO1_DEB_ENA */
#define WM8400_GPIO1_DEB_ENA_SHIFT                   7  /* GPIO1_DEB_ENA */
#define WM8400_GPIO1_DEB_ENA_WIDTH                   1  /* GPIO1_DEB_ENA */
#define WM8400_GPIO1_IRQ_ENA                    0x0040  /* GPIO1_IRQ_ENA */
#define WM8400_GPIO1_IRQ_ENA_MASK               0x0040  /* GPIO1_IRQ_ENA */
#define WM8400_GPIO1_IRQ_ENA_SHIFT                   6  /* GPIO1_IRQ_ENA */
#define WM8400_GPIO1_IRQ_ENA_WIDTH                   1  /* GPIO1_IRQ_ENA */
#define WM8400_GPIO1_PU                         0x0020  /* GPIO1_PU */
#define WM8400_GPIO1_PU_MASK                    0x0020  /* GPIO1_PU */
#define WM8400_GPIO1_PU_SHIFT                        5  /* GPIO1_PU */
#define WM8400_GPIO1_PU_WIDTH                        1  /* GPIO1_PU */
#define WM8400_GPIO1_PD                         0x0010  /* GPIO1_PD */
#define WM8400_GPIO1_PD_MASK                    0x0010  /* GPIO1_PD */
#define WM8400_GPIO1_PD_SHIFT                        4  /* GPIO1_PD */
#define WM8400_GPIO1_PD_WIDTH                        1  /* GPIO1_PD */
#define WM8400_GPIO1_SEL_MASK                   0x000F  /* GPIO1_SEL - [3:0] */
#define WM8400_GPIO1_SEL_SHIFT                       0  /* GPIO1_SEL - [3:0] */
#define WM8400_GPIO1_SEL_WIDTH                       4  /* GPIO1_SEL - [3:0] */

/*
 * R20 (0x14) - GPIO3 & GPIO4
 */
#define WM8400_GPIO4_DEB_ENA                    0x8000  /* GPIO4_DEB_ENA */
#define WM8400_GPIO4_DEB_ENA_MASK               0x8000  /* GPIO4_DEB_ENA */
#define WM8400_GPIO4_DEB_ENA_SHIFT                  15  /* GPIO4_DEB_ENA */
#define WM8400_GPIO4_DEB_ENA_WIDTH                   1  /* GPIO4_DEB_ENA */
#define WM8400_GPIO4_IRQ_ENA                    0x4000  /* GPIO4_IRQ_ENA */
#define WM8400_GPIO4_IRQ_ENA_MASK               0x4000  /* GPIO4_IRQ_ENA */
#define WM8400_GPIO4_IRQ_ENA_SHIFT                  14  /* GPIO4_IRQ_ENA */
#define WM8400_GPIO4_IRQ_ENA_WIDTH                   1  /* GPIO4_IRQ_ENA */
#define WM8400_GPIO4_PU                         0x2000  /* GPIO4_PU */
#define WM8400_GPIO4_PU_MASK                    0x2000  /* GPIO4_PU */
#define WM8400_GPIO4_PU_SHIFT                       13  /* GPIO4_PU */
#define WM8400_GPIO4_PU_WIDTH                        1  /* GPIO4_PU */
#define WM8400_GPIO4_PD                         0x1000  /* GPIO4_PD */
#define WM8400_GPIO4_PD_MASK                    0x1000  /* GPIO4_PD */
#define WM8400_GPIO4_PD_SHIFT                       12  /* GPIO4_PD */
#define WM8400_GPIO4_PD_WIDTH                        1  /* GPIO4_PD */
#define WM8400_GPIO4_SEL_MASK                   0x0F00  /* GPIO4_SEL - [11:8] */
#define WM8400_GPIO4_SEL_SHIFT                       8  /* GPIO4_SEL - [11:8] */
#define WM8400_GPIO4_SEL_WIDTH                       4  /* GPIO4_SEL - [11:8] */
#define WM8400_GPIO3_DEB_ENA                    0x0080  /* GPIO3_DEB_ENA */
#define WM8400_GPIO3_DEB_ENA_MASK               0x0080  /* GPIO3_DEB_ENA */
#define WM8400_GPIO3_DEB_ENA_SHIFT                   7  /* GPIO3_DEB_ENA */
#define WM8400_GPIO3_DEB_ENA_WIDTH                   1  /* GPIO3_DEB_ENA */
#define WM8400_GPIO3_IRQ_ENA                    0x0040  /* GPIO3_IRQ_ENA */
#define WM8400_GPIO3_IRQ_ENA_MASK               0x0040  /* GPIO3_IRQ_ENA */
#define WM8400_GPIO3_IRQ_ENA_SHIFT                   6  /* GPIO3_IRQ_ENA */
#define WM8400_GPIO3_IRQ_ENA_WIDTH                   1  /* GPIO3_IRQ_ENA */
#define WM8400_GPIO3_PU                         0x0020  /* GPIO3_PU */
#define WM8400_GPIO3_PU_MASK                    0x0020  /* GPIO3_PU */
#define WM8400_GPIO3_PU_SHIFT                        5  /* GPIO3_PU */
#define WM8400_GPIO3_PU_WIDTH                        1  /* GPIO3_PU */
#define WM8400_GPIO3_PD                         0x0010  /* GPIO3_PD */
#define WM8400_GPIO3_PD_MASK                    0x0010  /* GPIO3_PD */
#define WM8400_GPIO3_PD_SHIFT                        4  /* GPIO3_PD */
#define WM8400_GPIO3_PD_WIDTH                        1  /* GPIO3_PD */
#define WM8400_GPIO3_SEL_MASK                   0x000F  /* GPIO3_SEL - [3:0] */
#define WM8400_GPIO3_SEL_SHIFT                       0  /* GPIO3_SEL - [3:0] */
#define WM8400_GPIO3_SEL_WIDTH                       4  /* GPIO3_SEL - [3:0] */

/*
 * R21 (0x15) - GPIO5 & GPIO6
 */
#define WM8400_GPIO6_DEB_ENA                    0x8000  /* GPIO6_DEB_ENA */
#define WM8400_GPIO6_DEB_ENA_MASK               0x8000  /* GPIO6_DEB_ENA */
#define WM8400_GPIO6_DEB_ENA_SHIFT                  15  /* GPIO6_DEB_ENA */
#define WM8400_GPIO6_DEB_ENA_WIDTH                   1  /* GPIO6_DEB_ENA */
#define WM8400_GPIO6_IRQ_ENA                    0x4000  /* GPIO6_IRQ_ENA */
#define WM8400_GPIO6_IRQ_ENA_MASK               0x4000  /* GPIO6_IRQ_ENA */
#define WM8400_GPIO6_IRQ_ENA_SHIFT                  14  /* GPIO6_IRQ_ENA */
#define WM8400_GPIO6_IRQ_ENA_WIDTH                   1  /* GPIO6_IRQ_ENA */
#define WM8400_GPIO6_PU                         0x2000  /* GPIO6_PU */
#define WM8400_GPIO6_PU_MASK                    0x2000  /* GPIO6_PU */
#define WM8400_GPIO6_PU_SHIFT                       13  /* GPIO6_PU */
#define WM8400_GPIO6_PU_WIDTH                        1  /* GPIO6_PU */
#define WM8400_GPIO6_PD                         0x1000  /* GPIO6_PD */
#define WM8400_GPIO6_PD_MASK                    0x1000  /* GPIO6_PD */
#define WM8400_GPIO6_PD_SHIFT                       12  /* GPIO6_PD */
#define WM8400_