/*
* Cadence UART driver (found in Xilinx Zynq)
*
* 2011 - 2014 (C) Xilinx Inc.
*
* This program is free software; you can redistribute it
* and/or modify it under the terms of the GNU General Public
* License as published by the Free Software Foundation;
* either version 2 of the License, or (at your option) any
* later version.
*
* This driver has originally been pushed by Xilinx using a Zynq-branding. This
* still shows in the naming of this file, the kconfig symbols and some symbols
* in the code.
*/
#if defined(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif
#include <linux/platform_device.h>
#include <linux/serial.h>
#include <linux/console.h>
#include <linux/serial_core.h>
#include <linux/slab.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/module.h>
#define CDNS_UART_TTY_NAME "ttyPS"
#define CDNS_UART_NAME "xuartps"
#define CDNS_UART_MAJOR 0 /* use dynamic node allocation */
#define CDNS_UART_MINOR 0 /* works best with devtmpfs */
#define CDNS_UART_NR_PORTS 2
#define CDNS_UART_FIFO_SIZE 64 /* FIFO size */
#define CDNS_UART_REGISTER_SPACE 0xFFF
#define cdns_uart_readl(offset) ioread32(port->membase + offset)
#define cdns_uart_writel(val, offset) iowrite32(val, port->membase + offset)
/* Rx Trigger level */
static int rx_trigger_level = 56;
module_param(rx_trigger_level, uint, S_IRUGO);
MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
/* Rx Timeout */
static int rx_timeout = 10;
module_param(rx_timeout, uint, S_IRUGO);
MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
/* Register offsets for the UART. */
#define CDNS_UART_CR_OFFSET 0x00 /* Control Register */
#define CDNS_UART_MR_OFFSET 0x04 /* Mode Register */
#define CDNS_UART_IER_OFFSET 0x08 /* Interrupt Enable */
#define CDNS_UART_IDR_OFFSET 0x0C /* Interrupt Disable */
#define CDNS_UART_IMR_OFFSET 0x10 /* Interrupt Mask */
#define CDNS_UART_ISR_OFFSET 0x14 /* Interrupt Status */
#define CDNS_UART_BAUDGEN_OFFSET 0x18 /* Baud Rate Generator */
#define CDNS_UART_RXTOUT_OFFSET 0x1C /* RX Timeout */
#define CDNS_UART_RXWM_OFFSET 0x20 /* RX FIFO Trigger Level */
#define CDNS_UART_MODEMCR_OFFSET 0x24 /* Modem Control */
#define CDNS_UART_MODEMSR_OFFSET 0x28 /* Modem Status */
#define CDNS_UART_SR_OFFSET 0x2C /* Channel Status */
#define CDNS_UART_FIFO_OFFSET 0x30 /* FIFO */
#define CDNS_UART_BAUDDIV_OFFSET 0x34 /* Baud Rate Divider */
#de
