/* * S3C24XX IRQ handling * * Copyright (c) 2003-2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * Copyright (c) 2012 Heiko Stuebner <heiko@sntech.de> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details.*/#include<linux/init.h>#include<linux/slab.h>#include<linux/module.h>#include<linux/io.h>#include<linux/err.h>#include<linux/interrupt.h>#include<linux/ioport.h>#include<linux/device.h>#include<linux/irqdomain.h>#include<linux/irqchip/chained_irq.h>#include<linux/of.h>#include<linux/of_irq.h>#include<linux/of_address.h>#include<asm/exception.h>#include<asm/mach/irq.h>#include<mach/regs-irq.h>#include<mach/regs-gpio.h>#include<plat/cpu.h>#include<plat/regs-irqtype.h>#include<plat/pm.h>#include"irqchip.h"#define S3C_IRQTYPE_NONE 0#define S3C_IRQTYPE_EINT 1#define S3C_IRQTYPE_EDGE 2#define S3C_IRQTYPE_LEVEL 3structs3c_irq_data{unsignedinttype;unsignedlongoffset;unsignedlongparent_irq;/* data gets filled during init */structs3c_irq_intc*intc;unsignedlongsub_bits;structs3c_irq_intc*sub_intc;};/* * Sructure holding the controller data * @reg_pending register holding pending irqs * @reg_intpnd special register intpnd in main intc * @reg_mask mask register * @domain irq_domain of the controller * @parent parent controller for ext and sub irqs * @irqs irq-data, always s3c_irq_data[32] */structs3c_irq_intc{void__iomem*reg_pending;void__iomem*reg_intpnd;void__iomem*reg_mask;structirq_domain*domain;structs3c_irq_intc*parent;structs3c_irq_data*irqs;};/* * Array holding pointers to the global controller structs * [0] ... main_intc * [1] ... sub_intc * [2] ... main_intc2 on s3c2416 */staticstructs3c_irq_intc*s3c_intc[3];staticvoids3c_irq_mask(structirq_data*data){structs3c_irq_data*irq_data=irq_data_get_irq_chip_data(data);structs3c_irq_intc*intc=irq_data->intc;structs3c_irq_intc*parent_intc=intc->parent;structs3c_irq_data*parent_data;unsignedlongmask;unsignedintirqno;mask=__raw_readl(intc->reg_mask);mask|=(1UL<<irq_data->offset);__raw_writel(mask,intc->reg_mask);if(pare