/*
* Copyright (c) 2008, 2009, 2010 QLogic Corporation. All rights reserved.
*
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
/* This file is mechanically generated from RTL. Any hand-edits will be lost! */
#define QIB_7220_Revision_OFFS 0x0
#define QIB_7220_Revision_R_Simulator_LSB 0x3F
#define QIB_7220_Revision_R_Simulator_RMASK 0x1
#define QIB_7220_Revision_R_Emulation_LSB 0x3E
#define QIB_7220_Revision_R_Emulation_RMASK 0x1
#define QIB_7220_Revision_R_Emulation_Revcode_LSB 0x28
#define QIB_7220_Revision_R_Emulation_Revcode_RMASK 0x3FFFFF
#define QIB_7220_Revision_BoardID_LSB 0x20
#define QIB_7220_Revision_BoardID_RMASK 0xFF
#define QIB_7220_Revision_R_SW_LSB 0x18
#define QIB_7220_Revision_R_SW_RMASK 0xFF
#define QIB_7220_Revision_R_Arch_LSB 0x10
#define QIB_7220_Revision_R_Arch_RMASK 0xFF
#define QIB_7220_Revision_R_ChipRevMajor_LSB 0x8
#define QIB_7220_Revision_R_ChipRevMajor_RMASK 0xFF
#define QIB_7220_Revision_R_ChipRevMinor_LSB 0x0
#define QIB_7220_Revision_R_ChipRevMinor_RMASK 0xFF
#define QIB_7220_Control_OFFS 0x8
#define QIB_7220_Control_SyncResetExceptPcieIRAMRST_LSB 0x7
#define QIB_7220_Control_SyncResetExceptPcieIRAMRST_RMASK 0x1
#define QIB_7220_Control_PCIECplQDiagEn_LSB 0x6
#define QIB_7220_Control_PCIECplQDiagEn_RMASK 0x1
#define QIB_7220_Control_Reserved_LSB 0x5
#define QIB_7220_Control_Reserved_RMASK 0x1
#define QIB_7220_Control_TxLatency_LSB 0x4
#define QIB_7220_Control_TxLatency_RMASK 0x1
#define QIB_7220_Control_PCIERetryBufDiagEn_LSB 0x3
#define QIB_7220_Control_PCIERetryBufDiagEn_RMASK 0x1
#define QIB_7220_Control_LinkEn_LSB 0x2
#define QIB_7220_Control_LinkEn_RMASK 0x1
#define QIB_7220_Control_FreezeMode_LSB 0x1
#define QIB_7220_Control_FreezeMode_RMASK 0x1
#define QIB_7220_Control_SyncReset_LSB 0x0
#define QIB_7220_Control_SyncReset_RMASK 0x1
#define QIB_7220_PageAlign_OFFS 0x10
#define QIB_7220_PortCnt_OFFS 0x18
#define QIB_7220_SendRegBase_OFFS 0x30
#define QIB_7220_UserRegBase_OFFS 0x38
#define QIB_7220_CntrRegBase_OFFS 0x40
#define QIB_7220_Scratch_OFFS 0x48
#define QIB_7220_In
