path: root/arch/powerpc/boot/dts/mpc8569mds.dts

/*
 * MPC8569E MDS Device Tree Source
 *
 * Copyright (C) 2009 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8569EMDS";
	compatible = "fsl,MPC8569EMDS";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		serial0 = &serial0;
		serial1 = &serial1;
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		ethernet5 = &enet5;
		ethernet7 = &enet7;
		pci1 = &pci1;
		rapidio0 = &rio0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8569@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;		// L1, 32K
			i-cache-size = <0x8000>;		// L1, 32K
			sleep = <&pmc 0x00008000	// core
				 &pmc 0x00004000>;	// timebase
			timebase-frequency = <0>;
			bus-frequency = <0>;
			clock-frequency = <0>;
			next-level-cache = <&L2>;
		};
	};

	memory {
		device_type = "memory";
	};

	localbus@e0005000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
		reg = <0xe0005000 0x1000>;
		interrupts = <19 2>;
		interrupt-parent = <&mpic>;
		sleep = <&pmc 0x08000000>;

		ranges = <0x0 0x0 0xfe000000 0x02000000
			  0x1 0x0 0xf8000000 0x00008000
			  0x2 0x0 0xf0000000 0x04000000
			  0x3 0x0 0xfc000000 0x00008000
			  0x4 0x0 0xf8008000 0x00008000
			  0x5 0x0 0xf8010000 0x00008000>;

		nor@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "cfi-flash";
			reg = <0x0 0x0 0x02000000>;
			bank-width = <1>;
			device-width = <1>;
			partition@0 {
				label = "ramdisk";
				reg = <0x00000000 0x01c00000>;
			};
			partition@1c00000 {
				label = "kernel";
				reg = <0x01c00000 0x002e0000>;
			};
			partiton@1ee0000 {
				label = "dtb";
				reg = <0x01ee0000 0x00020000>;
			};
			partition@1f00000 {
				label = "firmware";
				reg = <0x01f00000 0x00080000>;
				read-only;
			};
			partition@1f80000 {
				label = "u-boot";
				reg = <0x01f80000 0x00080000>;
				read-only;
			};
		};

		bcsr@1,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8569mds-bcsr";
			reg = <1 0 0x8000>;
			ranges = <0 1 0 0x8000>;

			bcsr17: gpio-controller@11 {
				#gpio-cells = <2>;
				compatible = "fsl,mpc8569mds-bcsr-gpio";
				reg = <0x11 0x1>;
				gpio-controller;
			};
		};

		nand@3,0 {
			compatible = "fsl,mpc8569-fcm-nand",
				     "fsl,elbc-fcm-nand";
			reg = <3 0 0x8000>;
		};

		pib@4,0 {
			compatible = "fsl,mpc8569mds-pib";
			reg = <4 0 0x8000>;
		};

		pib@5,0 {
			compatible = "fsl,mpc8569mds-pib";
			reg = <5 0 0x8000>;
		};
	};

	soc@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "fsl,mpc8569-immr", "simple-bus";
		ranges = <0x0 0xe0000000 0x100000>;
		bus-frequency = <0>;

		ecm-law@0 {
			compatible = "fsl,ecm-law";
			reg = <0x0 0x1000>;
			fsl,num-laws = <10>;
		};

		ecm@1000 {
			compatible = "fsl,mpc8569-ecm", "fsl,ecm";
			reg = <0x1000 0x1000>;
			interrupts = <17 2>;
			interrupt-parent = <&mpic>;
		};

		memory-controller@2000 {
			compatible = "fsl,mpc8569-memory-controller";
			reg = <0x2000 0x1000>;
			interrupt-parent = <&mpic>;
			interrupts = <18 2>;
		};

		i2c-sleep-nexus {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			sleep = <&pmc 0x00000004>;
			ranges;

			i2c@3000 {
				#address-cells = <1>;
				#size-cells = <0>;
				cell-index = <0>;
				compatible = "fsl-i2c";
				reg = <0x3000 0x100>;