aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/omap4-var_som.dts
blob: 6601e6af6092f78d11757a8c34e1ec69ca6e9fa7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
/*
 * Copyright (C) 2012 Variscite Ltd. - http://www.variscite.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

/include/ "omap4.dtsi"

/ {
	model = "Variscite OMAP4 SOM";
	compatible = "var,omap4-var_som", "ti,omap4430", "ti,omap4";

	memory {
		device_type = "memory";
		reg = <0x80000000 0x40000000>; /* 1 GB */
	};

	vdd_eth: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "VDD_ETH";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
		regulator-boot-on;
	};
};

&i2c1 {
	clock-frequency = <400000>;

	twl: twl@48 {
		reg = <0x48>;
		/* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
		interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
		interrupt-parent = <&gic>;
	};
};

/include/ "twl6030.dtsi"

&i2c2 {
	clock-frequency = <400000>;
};

&i2c3 {
	clock-frequency = <400000>;

	/*
	 * Temperature Sensor
	 * http://www.ti.com/lit/ds/symlink/tmp105.pdf
	 */
	tmp105@49 {
		compatible = "ti,tmp105";
		reg = <0x49>;
	};
};

&i2c4 {
	clock-frequency = <400000>;
};

&mcspi1 {
	eth@0 {
		compatible = "ks8851";
		spi-max-frequency = <24000000>;
		reg = <0>;
		interrupt-parent = <&gpio6>;
		interrupts = <11>; /* gpio line 171 */
		vdd-supply = <&vdd_eth>;
	};
};

&mmc1 {
	vmmc-supply = <&vmmc>;
	ti,bus-width = <8>;
	ti,non-removable;
};

&mmc2 {
	status = "disabled";
};

&mmc3 {
	status = "disabled";
};

&mmc4 {
	status = "disabled";
};

&mmc5 {
	ti,bus-width = <4>;
};