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path: root/drivers/gpu/drm/nouveau/core/subdev/mc
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2014-06-11drm/nv50-/mc: also pass PMGR interrupts onto I2C subdevBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nv50-/mc: fix kms pageflip events by reordering irq handling order.Mario Kleiner
Whenever a single nouveau_mc_intr() main gpu irq-handler invocation was responsible for calling both, the vblank-irq handler (display engine irq) and kms-pageflip completion handler (from fifo irq), the order of invocation was wrong. nouveau_finish_flip() was called before drm_handle_vblank() for the vblank of pageflip completion, so the emitted pageflip event contained stale vblank count and timestamp from previous vblank. This caused failure in userspace to timestamp properly. Reorder order of invocation of engine irq handlers: Put NVDEV_ENGINE_DISP always on top, and thereby before NVDEV_ENGINE_FIFO, so that drm_handle_vblank() gets called to update vblank timestamps and count before potential pageflip events make use of that information. This works on nv-50 and later, where kms-pageflip completion triggers an irq either after a separate vblank irq, or both pageflip and vblank trigger one common irq invocation, but never before vblank irqs. v2 (Ben): - removed mods for nv04-nv40, it doesn't help there anyway - this is considered a hack, and a better solution should be found Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: <stable@vger.kernel.org> # 3.13+
2014-03-26support for platform devicesAlexandre Courbot
Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead of PCI to which Nouveau is tightly dependent. This patch allows Nouveau to handle platform devices by: - abstracting PCI-dependent functions that were typically used for resource querying and page mapping, - introducing a nv_device_is_pci() function that allows to make PCI-dependent code conditional, - providing a nouveau_drm_platform_probe() function that takes a GPU platform device to be probed. Core code as well as engine/subdev drivers are updated wherever possible to make use of these functions. Some older drivers are too dependent on PCI to be properly updated, but all newer code on which future chips may depend should at least be runnable with platform devices. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-02-18drm/nv4c/mc: nv4x igp's have a different msi rearm registerIlia Mirkin
See https://bugs.freedesktop.org/show_bug.cgi?id=74492 Reported-by: Ronald <ronald645@gmail.com> Suggested-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-23drm/nvc0-/fb: hook up skeleton interrupt handlerBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08Merge tag 'drm-intel-fixes-2013-11-07' of ↵Dave Airlie
git://people.freedesktop.org/~danvet/drm-intel into drm-next Bit a bit -fixes pull request in the merge window than usual dua to two feauture-y things: - Display CRCs are now enabled on all platforms, including the odd DP case on gm45/vlv. Since this is a testing-only feature it should ever hurt, but I figured it'll help with regression-testing -fixes. So I left it in and didn't postpone it to 3.14. - Display power well refactoring from Imre. Would have caused major pain conflict with the bdw stage 1 patches if I'd postpone this to -next. It's only an relatively small interface rework, so shouldn't cause pain. It's also been in my tree since almost 3 weeks already. That accounts for about two thirds of the pull, otherwise just bugfixes: - vlv backlight fix from Jesse/Jani - vlv vblank timestamp fix from Jesse - improved edp detection through vbt from Ville (fixes a vlv issue) - eDP vdd fix from Paulo - fixes for dvo lvds on i830M - a few smaller things all over Note: This contains a backmerge of v3.12. Since the -internal branch always applied on top of -nightly I need that unified base to merge bdw patches. So you'll get a conflict with radeon connector props when pulling this (and nouveau/master will also conflict a bit when Ben doesn't rebase). The backmerge itself only had conflicts in drm/i915. There's also a tiny conflict between Jani's backlight fix and your sysfs lifetime fix in drm-next. * tag 'drm-intel-fixes-2013-11-07' of git://people.freedesktop.org/~danvet/drm-intel: (940 commits) drm/i915/vlv: use per-pipe backlight controls v2 drm/i915: make backlight functions take a connector drm/i915: move opregion asle request handling to a work queue drm/i915/vlv: use PIPE_START_VBLANK interrupts on VLV drm/i915: Make intel_dp_is_edp() less specific drm/i915: Give names to the VBT child device type bits drm/i915/vlv: enable HDA display audio for Valleyview2 drm/i915/dvo: call ->mode_set callback only when the port is running drm/i915: avoid unclaimed registers when capturing the error state drm/i915: Enable DP port CRC for the "auto" source on g4x/vlv drm/i915: scramble reset support for DP port CRC on vlv drm/i915: scramble reset support for DP port CRC on g4x drm/i916: add "auto" pipe CRC source ... Conflicts: MAINTAINERS drivers/gpu/drm/i915/intel_panel.c drivers/gpu/drm/nouveau/core/subdev/mc/base.c drivers/gpu/drm/radeon/atombios_encoders.c drivers/gpu/drm/radeon/radeon_connectors.c
2013-11-08drm/nouveau/pwr: initial implementationBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/mc: fix (incorrect) reporting of unknown pending intr bitsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nvaa/mc: blacklist msi to off by defaultBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirrorBen Skeggs
This is what NVIDIA do on these chipsets, let's hope it works around the reported MSI failures for us on NV86. v2: updated to include G92, as per information provided by NVIDIA. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearmBen Skeggs
v2. updated to cover GF104, as per information provided by NVIDIA. Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/mc: store static data in nouveau_mc class definitionBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/mc: fetch NV_PMC_INTR again after re-arming MSIBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/mc: bracket interrupt handler with NV_PMC_INTR_EN disable/re-enableBen Skeggs
This looks to be what NVIDIA do pretty much everywhere, since forever. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/mc: have single entry and exit points to the interrupt handlerBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nouveau/mc: msi rearm write via subdev, not deviceBen Skeggs
This way we can catch it with debugging on for PMC subdev. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-08drm/nv10/kms: add plane support for nv10-nv40Ilia Mirkin
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-06nouveau: drop interrupt busy setting.Dave Airlie
This causes problems with never going busy due to ptherm polling, and after talking to Ben I can't see it being required. Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-08drm/nouveau/mc: disable msi support by default, it's busted in tons of placesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-09-04drm/nouveau: use MSI interruptsLucas Stach
MSIs were only problematic on some old, broken chipsets. But now that we already see systems where PCI legacy interrupts are somewhat flaky, it's really time to move to MSIs. v2 (Ben Skeggs): blacklist BR02 boards Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-09-04drm/nouveau/vdec: implement support for VP3 enginesIlia Mirkin
For NV98+, BSP/VP/PPP are all FUC-based engines. Hook them all up in the same way as NVC0, but with a couple of different values. Also make sure that the PPP engine is handled in the fifo/mc/vm. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-09-02Merge branch 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next Alex writes: This is the radeon drm-next request. Big changes include: - support for dpm on CIK parts - support for ASPM on CIK parts - support for berlin GPUs - major ring handling cleanup - remove the old 3D blit code for bo moves in favor of CP DMA or sDMA - lots of bug fixes [airlied: fix up a bunch of conflicts from drm_order removal] * 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux: (898 commits) drm/radeon/dpm: make sure dc performance level limits are valid (CI) drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2) drm/radeon: gcc fixes for extended dpm tables drm/radeon: gcc fixes for kb/kv dpm drm/radeon: gcc fixes for ci dpm drm/radeon: gcc fixes for si dpm drm/radeon: gcc fixes for ni dpm drm/radeon: gcc fixes for trinity dpm drm/radeon: gcc fixes for sumo dpm drm/radeonn: gcc fixes for rv7xx/eg/btc dpm drm/radeon: gcc fixes for rv6xx dpm drm/radeon: gcc fixes for radeon_atombios.c drm/radeon: enable UVD interrupts on CIK drm/radeon: fix init ordering for r600+ drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled drm/radeon: check the return value of uvd_v1_0_start in uvd_v1_0_init drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume radeon kms: fix uninitialised hotplug work usage in r100_irq_process() drm/radeon/audio: set up the sads on DCE3.2 asics drm/radeon: fix handling of variable sized arrays for router objects ... Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/i915/i915_gem_dmabuf.c drivers/gpu/drm/i915/intel_pm.c drivers/gpu/drm/radeon/cik.c drivers/gpu/drm/radeon/ni.c drivers/gpu/drm/radeon/r600.c
2013-08-29nouveau: add runtime PM support (v0.9)Dave Airlie
This hooks nouveau up to the runtime PM system to enable dynamic power management for secondary GPUs in switchable and optimus laptops. a) rewrite suspend/resume printks to hide them during dynamic s/r to avoid cluttering logs b) add runtime pm suspend to irq handler, crtc display, ioctl handler, connector status, c) handle hdmi audio dynamic power on/off using magic register. v0.5: make sure we hit D3 properly fix fbdev_set_suspend locking interaction, we only will poweroff if we have no active crtcs/fbcon anyways. add reference for active crtcs. sprinkle mark last busy for autosuspend timeout v0.6: allow more flexible debugging - to avoid log spam add option to enable/disable dynpm got to D3Cold v0.7: add hdmi audio support. v0.8: call autosuspend from idle, so pci config space access doesn't go straight back to sleep, this makes starting X faster. only signal usage if we actually handle the irq, otherwise usb keeps us awake. fix nv50 display active powerdown v0.9: use masking function to enable hdmi audio set busy when we fail to suspend Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-08-21drm/nouveau/mc: fix race condition between constructor and request_irq()Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-30drm/nv50/mc: include vp in the fb error reporting maskIlia Mirkin
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nouveau/vp/nv84: initial vp2 engine implementationIlia Mirkin
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-07-01drm/nve0/ce: stub interrupt handlerBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-04-26drm/nouveau/mc: handle irq-related setup ourselvesBen Skeggs
We need to be able to process interrupts before the DRM code is able to actually enable them, set it up ourselves. Also, it's less convoluted to *not* use the DRM wrappers it appears... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/therm: implement support for temperature alarmsMartin Peres
For now, we only boost the fan speed to the maximum and auto-mode when hitting the FAN_BOOST threshold and halt the computer when it reaches the shutdown temperature. The downclock and critical thresholds do nothing. On nv43:50 and nva3+, temperature is polled because of the limited hardware. I'll improve the nva3+ situation by implementing alarm management in PDAEMON whenever I can but polling once every second shouldn't be such a problem. v2 (Ben Skeggs): - rebased v3: fixed false-detections and threshold reprogrammation handling on nv50:nvc0 Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2013-02-20drm/nouveau/pbus: add a PBUS subdev that hands IRQs to the right subdevsMartin Peres
We are going to use PTHERM's IRQs for thermal monitoring but we need to route them first. On nv31-50, PBUS's IRQ line is shared with GPIOs IRQs. It seems like nv10-31 GPIO interruptions aren't well handled. I kept the original behaviour but it is wrong and may lead to an IRQ storm. Since we enable all PBUS IRQs, we need a way to avoid being stormed if we don't handle them. The solution I used was to mask the IRQs that have not been handled. This will also print one message in the logs to let us know. v2: drop the shared intr handler because of was racy v3: style fixes v4: drop a useless construct in the chipset-dependent INTR v5: add BUS to the disable mask v6 (Ben Skeggs): - general tidy to match the rest of the driver's style - nva3->nvc0, nva3 can be serviced just fine with nv50.c, rnndb even notes that the THERM_ALARM bit got left in the hw until fermi anyway.. so, it's not going to conflict - removed the peephole and user stuff, for the moment.. will handle them later if we find a good reason to actually care.. - limited INTR_EN to just what we can handle for now, mostly to prevent spam of unknown status bits (seen on at least nv4x) Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-11-29drm/nve0/vp: implement initial support for engineBen Skeggs
Will allow use of the engine if firmware (nvXX_fuc085) provided. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29drm/nv50/fb: implement trap handler as subdev interrupt handlerBen Skeggs
nv50_fb_trap() will now be called automagically by the mc intr handler, rather than each engine's handler having to check for traps manually. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-11-29drm/nouveau/mc: allow calling of multiple handlers for a give intr bitBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nve0/ibus: handle PIBUS interrupts to prevent stormBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau/fb: merge fb/vram and port to subdev interfacesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau/mc: port to subdev interfacesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau: implement module init functions in nouveau_drm.cBen Skeggs
These currently just call the existing ones in nouveau_drv.c, but will be extended in upcoming commits. This needed to be separated from the current code as there will be some header clashes until things are ported. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau: restructure source tree, split core from drm implementationBen Skeggs
Future work will be headed in the way of separating the policy supplied by the nouveau drm module from the mechanisms provided by the driver core. There will be a couple of major classes (subdev, engine) of driver modules that have clearly defined tasks, and the further directory structure change is to reflect this. No code changes here whatsoever, aside from fixing up a couple of include file pathnames. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>