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path: root/drivers/gpu/drm/i915
AgeCommit message (Expand)Author
2014-05-22drm/i915: Wait for pending page flips before enabling/disabling the primary p...Ville Syrjälä
2014-05-22drm/i915: grab the audio power domain when enabling audio on HSW+Paulo Zanoni
2014-05-22drm/i915: don't read HSW_AUD_PIN_ELD_CP_VLD when the power well is offPaulo Zanoni
2014-05-22drm/i915: move bsd dispatch index somewhere betterDaniel Vetter
2014-05-22drm/i915: Shuffle fifo underrun disable/enable points for gmch platformsVille Syrjälä
2014-05-22drm/i915: Simplify the uncleared FIFO underrun detectionVille Syrjälä
2014-05-22drm/i915: Check for FIFO underruns at the end of modeset on gmchVille Syrjälä
2014-05-22drm/i915: Check for FIFO underuns when disabling reporting on gmch platformsVille Syrjälä
2014-05-22drm/i915: Add a brief description of the VLV display PHY internalsVille Syrjälä
2014-05-22drm/i915: Add null state batch to active listMika Kuoppala
2014-05-21drm/i915: Re-enable vblank irqs for already active pipesVille Syrjälä
2014-05-21Merge branch 'topic/drm-vblank-rework' into drm-intel-next-queuedDaniel Vetter
2014-05-21drm/i915: Accurately initialize fifo underrun state on gmch platformsDaniel Vetter
2014-05-21drm/i915: rip our vblank reset hacks for runtime PMDaniel Vetter
2014-05-21drm/i915: Use new kms-native vblank functionsDaniel Vetter
2014-05-21drm/i915: Remove drm_vblank_pre/post_modeset callsDaniel Vetter
2014-05-21drm/i915: Move buffer pinning and ring selection to intel_crtc_page_flip()Ville Syrjälä
2014-05-21drm/i915: Drop the excessive vblank waits from modeset codepathsVille Syrjälä
2014-05-21drm/i915: Wait for vblank in hsw_enable_ips()Ville Syrjälä
2014-05-21drm/i915: Fix mmio vs. CS flip race on ILK+Ville Syrjälä
2014-05-21drm/i915: drop encoder hot_plug calls at resumeJesse Barnes
2014-05-20drm/i915: Drop now misleading DDI comment from dp_link_downDaniel Vetter
2014-05-20drm: Add drm_vblank_on()Ville Syrjälä
2014-05-20drm/i915: shuffle panel codeJani Nikula
2014-05-20drm/i915: Clear GDSR after reset on ILKVille Syrjälä
2014-05-20drm/i915: Kill RMW from ILK reset codeVille Syrjälä
2014-05-20drm/i915: add missing unregister_oom_notifier to the error/unload pathImre Deak
2014-05-20drm/i915: Drop /** */ comments from i915_reg.hVille Syrjälä
2014-05-20drm/i915/chv: Add a bunch of pre production workaroundsVille Syrjälä
2014-05-20drm/i915/chv: Use RMW to toggle swing calc initVille Syrjälä
2014-05-20drm/i915/chv: Don't do group access reads from TX lanes eitherVille Syrjälä
2014-05-20drm/i915/chv: Don't use PCS group access readsVille Syrjälä
2014-05-20drm/i915/chv: Set soft reset override bit for data lane resetsVille Syrjälä
2014-05-20drm/i915/chv: Reset data lanes in encoder .post_disable() hookVille Syrjälä
2014-05-20drm/i915/chv: Turn off dclkp after the PLL has been disabledVille Syrjälä
2014-05-20drm/i915/chv: Move data lane deassert to encoder pre_enableVille Syrjälä
2014-05-20drm/i915/chv: Fix CHV PLL state trackingVille Syrjälä
2014-05-20drm/i915/chv: Register port D encoders and connectorsVille Syrjälä
2014-05-20drm/i915/chv: Fix PORT_TO_PIPE for CHVVille Syrjälä
2014-05-20drm/i915/chv: Bump num_pipes to 3Ville Syrjälä
2014-05-20drm/i915/chv: Add cursor pipe offsetsVille Syrjälä
2014-05-20drm/i915/chv: Fix gmbus for port DVille Syrjälä
2014-05-20drm/i915/chv: Configure crtc_mask correctly for CHVVille Syrjälä
2014-05-20drm/i915/chv: Make CHV irq handler loop until all interrupts are consumedVille Syrjälä
2014-05-20drrm/i915/chv: Use valleyview_pipestat_irq_handler() for CHVVille Syrjälä
2014-05-20drm/i915/chv: Clarify VLV/CHV PIPESTAT bits a bit moreVille Syrjälä
2014-05-20drm/i915/chv: Add CHV display supportRafael Barbalho
2014-05-20drm/i915/chv: Implement WaDisableSamplerPowerBypass for CHVRafael Barbalho
2014-05-20drm/i915/chv: Add some workaround notesVille Syrjälä
2014-05-20drm/i915/chv: Implement WaDisableSDEUnitClockGating:chvVille Syrjälä
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