| Age | Commit message (Expand) | Author |
|---|---|---|
| 2007-10-11 | [MIPS] Allow hardwiring of the CPU type to a single type for optimization. | Ralf Baechle |
| 2007-10-11 | [MIPS] pg-r4k.c: Dump the generated code | Maciej W. Rozycki |
| 2007-10-03 | [MIPS] pg-r4k.c: Fix a typo in an R4600 v2 erratum workaround | Maciej W. Rozycki |
| 2007-01-08 | [MIPS] TX49: Fix use of CDEX build_store_reg() | Atsushi Nemoto |
| 2006-11-01 | [MIPS] 16K & 64K page size fixes | Ralf Baechle |
| 2006-06-01 | [MIPS] Treat R14000 like R10000. | Kumba |
| 2006-03-21 | [MIPS] TX49XX has prefetch. | Atsushi Nemoto |
| 2005-10-29 | Add/Fix missing bit of R4600 hit cacheop workaround. | Thiemo Seufer |
| 2005-10-29 | Let r4600 PRID detection match only legacy CPUs, cleanups. | Thiemo Seufer |
| 2005-10-29 | Avoid SMP cacheflushes. This is a minor optimization of startup but | Ralf Baechle |
| 2005-04-16 | Linux-2.6.12-rc2v2.6.12-rc2 | Linus Torvalds |
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