Age | Commit message (Expand) | Author |
2008-04-28 | [MIPS] Add support for MIPS CMP platform. | Ralf Baechle |
2008-04-28 | [MIPS] Allow setting of the cache attribute at run time. | Chris Dearman |
2008-04-07 | [MIPS] Handle aliases in vmalloc correctly. | Ralf Baechle |
2008-03-12 | [MIPS] Fix loads of section missmatches | Ralf Baechle |
2008-02-19 | [MIPS] Handle I-cache coherency in flush_cache_range() | Ralf Baechle |
2008-02-03 | arch/mips/: Spelling fixes | Joe Perches |
2008-01-29 | [MIPS] Alchemy: Au1210/Au1250 CPU support | Manuel Lauss |
2008-01-29 | [MIPS] Use real cache invalidate | Thomas Bogendoerfer |
2008-01-29 | [MIPS] Remove useless S-cache flushes. | Ralf Baechle |
2008-01-29 | [MIPS] Use pte_present instead of open coded test for _PAGE_PRESENT. | Ralf Baechle |
2007-11-15 | [MIPS] Sibyte: resurrect old cache hack. | Ralf Baechle |
2007-10-29 | [MIPS] MT: Fix bug in multithreaded kernels. | Ralf Baechle |
2007-10-16 | [MIPS] Cache: Provide more information on cache policy on bootup. | Ralf Baechle |
2007-10-11 | [MIPS] checkfiles: Fix "need space after that ','" errors. | Ralf Baechle |
2007-10-11 | [MIPS] Allow hardwiring of the CPU type to a single type for optimization. | Ralf Baechle |
2007-10-11 | [MIPS] Avoid indexed cacheops. | Ralf Baechle |
2007-10-11 | [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. | Ralf Baechle |
2007-07-31 | [MIPS] Replace use of stext with _stext. | Ralf Baechle |
2007-07-10 | [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 | Fuxin Zhang |
2006-11-30 | [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. | Ralf Baechle |
2006-11-30 | [MIPS] Remove redundant r4k_blast_icache() calls | Atsushi Nemoto |
2006-10-01 | [MIPS] Remove __flush_icache_page | Atsushi Nemoto |
2006-09-27 | [MIPS] c-r4k: Convert init functions from inline to __init. | Ralf Baechle |
2006-09-27 | [MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache. | Atsushi Nemoto |
2006-09-27 | [MIPS] Retire flush_icache_page from mm use. | Ralf Baechle |
2006-09-27 | [MIPS] c-r4k: Typo fix. | Ralf Baechle |
2006-07-13 | [MIPS] vr41xx: Replace magic number for P4K bit with symbol. | Yoichi Yuasa |
2006-07-13 | [MIPS] vr41xx: Changed workaround to recommended method | Yoichi Yuasa |
2006-07-13 | [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80. | Yoichi Yuasa |
2006-07-13 | [MIPS] Use the proper technical term for naming some of the cache macros. | Ralf Baechle |
2006-06-30 | Remove obsolete #include <linux/config.h> | Jörn Engel |
2006-06-29 | [MIPS] 74K: Assume it will also have an AR bit in config7 | Ralf Baechle |
2006-06-29 | [MIPS] Treat CPUs with AR bit as physically indexed. | Ralf Baechle |
2006-06-29 | [MIPS] Fix handling of 0 length I & D caches. | Chris Dearman |
2006-06-29 | [MIPS] MIPS32/MIPS64 secondary cache management | Chris Dearman |
2006-06-06 | [MIPS] Save write-only Config.OD from being clobbered | Sergei Shtylyov |
2006-06-01 | [MIPS] Treat R14000 like R10000. | Kumba |
2006-06-01 | [MIPS] Fix deadlock on MP with cache aliases. | Ralf Baechle |
2006-06-01 | [MIPS] Add missing 34K processor IDs | Nigel Stephens |
2006-04-19 | [MIPS] Use __ffs() instead of ffs() for waybit calculation. | Atsushi Nemoto |
2006-04-19 | [MIPS] Handle IDE PIO cache aliases on SMP. | Ralf Baechle |
2006-04-19 | [MIPS] Fix tx49_blast_icache32_page_indexed. | Atsushi Nemoto |
2006-03-21 | [MIPS] TX49XX has prefetch. | Atsushi Nemoto |
2006-03-18 | [MIPS] local_r4k_flush_cache_page fix | Atsushi Nemoto |
2006-02-28 | [MIPS] Initialize S-cache function pointers even on S-cache-less CPUs. | Ralf Baechle |
2006-02-14 | [MIPS] Add protected_blast_icache_range, blast_icache_range, etc. | Atsushi Nemoto |
2006-02-07 | [MIPS] Remove wrong __user tags. | Atsushi Nemoto |
2006-01-10 | MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. | Ralf Baechle |
2005-10-29 | Rename page argument of flush_cache_page to something more descriptive. | Ralf Baechle |
2005-10-29 | Cleanup the mess in cpu_cache_init. | Ralf Baechle |